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From:   Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Date:   Wed, 13 Dec 2023 12:04:32 +0200
Message-ID: <CAA8EJpqoUBbq52EHPK+TYC67RzRJt9pnDwLA1SrFdPmXxyG3dg@mail.gmail.com>
Subject: Re: [PATCH 15/16] arm64: dts: qcom: sm8550-aim300: add pmic glink port/endpoints
To:     Tengfei Fan <quic_tengfan@quicinc.com>
Cc:     agross@kernel.org, andersson@kernel.org, konrad.dybcio@linaro.org,
        robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org,
        conor+dt@kernel.org, tglx@linutronix.de,
        linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org,
        linux-kernel@vger.kernel.org, kernel@quicinc.com
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On Tue, 28 Nov 2023 at 10:11, Tengfei Fan <quic_tengfan@quicinc.com> wrote:
>
>
>
> =E5=9C=A8 11/17/2023 6:32 PM, Dmitry Baryshkov =E5=86=99=E9=81=93:
> > On 17/11/2023 12:18, Tengfei Fan wrote:
> >> Add nodes to support Type-C USB/DP functionality.
> >>
> >> On this platform, a Type-C redriver is added to the SuperSpeed graph.
> >>
> >> Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
> >> ---
> >>   arch/arm64/boot/dts/qcom/sm8550-aim300.dts | 88 ++++++++++++++++++++=
+-
> >>   1 file changed, 87 insertions(+), 1 deletion(-)
> >>
> >> diff --git a/arch/arm64/boot/dts/qcom/sm8550-aim300.dts
> >> b/arch/arm64/boot/dts/qcom/sm8550-aim300.dts
> >> index 6dc3040b9f76..f3c558dd40f1 100644
> >> --- a/arch/arm64/boot/dts/qcom/sm8550-aim300.dts
> >> +++ b/arch/arm64/boot/dts/qcom/sm8550-aim300.dts
> >> @@ -100,7 +100,15 @@
> >>                       reg =3D <1>;
> >>                       pmic_glink_ss_in: endpoint {
> >> -                        remote-endpoint =3D <&usb_1_dwc3_ss>;
> >> +                        remote-endpoint =3D <&redriver_ss_out>;
> >> +                    };
> >> +                };
> >> +
> >> +                port@2 {
> >> +                    reg =3D <2>;
> >> +
> >> +                    pmic_glink_sbu: endpoint {
> >> +                        remote-endpoint =3D <&fsa4480_sbu_mux>;
> >>                       };
> >>                   };
> >>               };
> >> @@ -519,6 +527,62 @@
> >>       };
> >>   };
> >> +&i2c_master_hub_0 {
> >> +    status =3D "okay";
> >> +};
> >> +
> >> +&i2c_hub_2 {
> >> +    status =3D "okay";
> >> +
> >> +    typec-mux@42 {
> >> +        compatible =3D "fcs,fsa4480";
> >> +        reg =3D <0x42>;
> >> +
> >> +        vcc-supply =3D <&vreg_bob1>;
> >> +
> >> +        mode-switch;
> >> +        orientation-switch;
> >> +
> >> +        port {
> >> +            fsa4480_sbu_mux: endpoint {
> >> +                remote-endpoint =3D <&pmic_glink_sbu>;
> >> +            };
> >> +        };
> >> +    };
> >> +
> >> +    typec-retimer@1c {
> >> +        compatible =3D "onnn,nb7vpq904m";
> >> +        reg =3D <0x1c>;
> >> +
> >> +        vcc-supply =3D <&vreg_l15b_1p8>;
> >> +
> >> +        orientation-switch;
> >> +        retimer-switch;
> >> +
> >> +        ports {
> >> +            #address-cells =3D <1>;
> >> +            #size-cells =3D <0>;
> >> +
> >> +            port@0 {
> >> +                reg =3D <0>;
> >> +
> >> +                redriver_ss_out: endpoint {
> >> +                    remote-endpoint =3D <&pmic_glink_ss_in>;
> >> +                };
> >> +            };
> >> +
> >> +            port@1 {
> >> +                reg =3D <1>;
> >> +
> >> +                redriver_ss_in: endpoint {
> >> +                    data-lanes =3D <3 2 1 0>;
> >> +                    remote-endpoint =3D <&usb_dp_qmpphy_out>;
> >> +                };
> >> +            };
> >> +        };
> >> +    };
> >> +};
> >> +
> >>   &gcc {
> >>       clocks =3D <&bi_tcxo_div2>, <&sleep_clk>,
> >>            <&pcie0_phy>,
> >> @@ -552,6 +616,16 @@
> >>       status =3D "okay";
> >>   };
> >> +&mdss_dp0 {
> >> +    status =3D "okay";
> >> +};
> >> +
> >> +&mdss_dp0_out {
> >> +    data-lanes =3D <0 1>;
> >
> > Why? Are you really limited to two lanes for DP by the hardware?
> I got confirmation from a colleague that it is right that limited to two
> lanes.

Excuse me, I missed your reply earlier. Is it 2 DP lanes and 2 SS USB
lanes? Or are there just 2 lanes which are shared between DP and SS
USB?

> >
> >> +    remote-endpoint =3D <&usb_dp_qmpphy_dp_in>;
> >> +};
> >> +
> >> +
> >>   &mdss_dsi0 {
> >>       vdda-supply =3D <&vreg_l3e_1p2>;
> >>       status =3D "okay";
> >> @@ -861,6 +935,18 @@
> >>       status =3D "okay";
> >>   };
> >> +&usb_dp_qmpphy_dp_in {
> >> +    remote-endpoint =3D <&mdss_dp0_out>;
> >> +};
> >> +
> >> +&usb_dp_qmpphy_out {
> >> +    remote-endpoint =3D <&redriver_ss_in>;
> >> +};
> >> +
> >> +&usb_dp_qmpphy_usb_ss_in {
> >> +    remote-endpoint =3D <&usb_1_dwc3_ss>;
> >> +};
> >> +
> >>   &xo_board {
> >>       clock-frequency =3D <76800000>;
> >>   };
> >
>
> --
> Thx and BRs,
> Tengfei Fan


--=20
With best wishes
Dmitry