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[2620:137:e000::3:4]) by mx.google.com with ESMTPS id iq1-20020a17090afb4100b0028aec3f1095si424394pjb.104.2023.12.13.02.22.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 13 Dec 2023 02:22:28 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:4 as permitted sender) client-ip=2620:137:e000::3:4; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:4 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by howler.vger.email (Postfix) with ESMTP id C14F18225C88; Wed, 13 Dec 2023 02:22:25 -0800 (PST) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.11 at howler.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235288AbjLMKWI (ORCPT + 99 others); Wed, 13 Dec 2023 05:22:08 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53628 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231482AbjLMKWH (ORCPT ); Wed, 13 Dec 2023 05:22:07 -0500 Received: from fd01.gateway.ufhost.com (fd01.gateway.ufhost.com [61.152.239.71]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7A546A7; Wed, 13 Dec 2023 02:22:12 -0800 (PST) Received: from EXMBX165.cuchost.com (unknown [175.102.18.54]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client CN "EXMBX165", Issuer "EXMBX165" (not verified)) by fd01.gateway.ufhost.com (Postfix) with ESMTP id 30FEC8219; Wed, 13 Dec 2023 18:22:04 +0800 (CST) Received: from EXMBX171.cuchost.com (172.16.6.91) by EXMBX165.cuchost.com (172.16.6.75) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Wed, 13 Dec 2023 18:22:04 +0800 Received: from [192.168.125.85] (183.27.97.57) by EXMBX171.cuchost.com (172.16.6.91) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Wed, 13 Dec 2023 18:21:59 +0800 Message-ID: <1f7630a5-13a7-40ef-bfa3-020db53b53d8@starfivetech.com> Date: Wed, 13 Dec 2023 18:21:54 +0800 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v12 15/21] PCI: microchip: Add event IRQ domain ops to struct plda_event Content-Language: en-US To: Lorenzo Pieralisi CC: Conor Dooley , =?UTF-8?Q?Krzysztof_Wilczy=C5=84ski?= , Rob Herring , Bjorn Helgaas , Daire McNamara , "Emil Renner Berthing" , Krzysztof Kozlowski , , , , , Paul Walmsley , "Palmer Dabbelt" , Albert Ou , "Philipp Zabel" , Mason Huo , Leyfoon Tan , Kevin Xie References: <20231206105839.25805-1-minda.chen@starfivetech.com> <20231206105839.25805-16-minda.chen@starfivetech.com> <9523aa6b-55a8-4e6a-a3ba-45d9b1dacc77@starfivetech.com> From: Minda Chen In-Reply-To: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit X-Originating-IP: [183.27.97.57] X-ClientProxiedBy: EXCAS066.cuchost.com (172.16.6.26) To EXMBX171.cuchost.com (172.16.6.91) X-YovoleRuleAgent: yovoleflag X-Spam-Status: No, score=-0.8 required=5.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on howler.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (howler.vger.email [0.0.0.0]); Wed, 13 Dec 2023 02:22:25 -0800 (PST) On 2023/12/13 17:50, Lorenzo Pieralisi wrote: > On Wed, Dec 13, 2023 at 04:15:39PM +0800, Minda Chen wrote: >> >> >> On 2023/12/12 19:19, Lorenzo Pieralisi wrote: >> > On Wed, Dec 06, 2023 at 06:58:33PM +0800, Minda Chen wrote: >> >> For lack of an MSI controller, The new added PCIe interrupts have to be >> >> added to global interrupt event field. PolarFire event domain ops can not >> >> be re-used. >> > >> > I don't understand what this means, please explain and I will >> > add it to the commit log. >> > >> Sorry. >> Microchip Polarfire PCIe adds 11 PCIe interrupts to PCIe global event domain.(Total 28 PCIe interrupts) >> The microchip event domain and event irqchip will handle these interrupts. >> But PLDA host contain 13 fixed PCIe interrupts. PLDA codes just process these >> 13 interrupts. Microchip the event irq codes are quite different and can't be used by PLDA codes. >> So add an event domain field support microchip and other vendor who just using the PLDA interrupts. >> >> PLDA event domain ops instances will be implemented in later patch. >> > >> > Future patches don't exist, each commit log is a logical change >> > that must make sense on its own, I will remove this sentence. >> > >> > Lorenzo >> >> OK, Thanks. >> >> >> Signed-off-by: Minda Chen >> >> Acked-by: Conor Dooley > > I am sorry folks but I still don't get what this patch is supposed > to do. To start with it looks like a preparation patch (it does > not have any net effect), that's not OK since it has to be merged > with the patches that actually apply significant changes on top > of this. > > Then I need an explanation of what the problem is and what is the > code actually changing in irqdomain/irqchip specific terms. > > I can't merge it as-is because I don't understand what it changes > and it is not clear by reading the commit log. > > Thanks, > Lorenzo > Actually I am not explain this clear. Sorry. I will changed this patch in next version and add more commit messages. The added parameter in struct plda_event is event IRQ chip instead of event IRQ domain ops. Actually the different configuration is irqchip. And I will add PLDA event irqchip and its functions to this patch, which can be compared with microchip's event irqchip functions. >> >> --- >> >> drivers/pci/controller/plda/pcie-microchip-host.c | 6 ++++-- >> >> drivers/pci/controller/plda/pcie-plda.h | 1 + >> >> 2 files changed, 5 insertions(+), 2 deletions(-) >> >> >> >> diff --git a/drivers/pci/controller/plda/pcie-microchip-host.c b/drivers/pci/controller/plda/pcie-microchip-host.c >> >> index f5e7da242aec..e6dcc572b65b 100644 >> >> --- a/drivers/pci/controller/plda/pcie-microchip-host.c >> >> +++ b/drivers/pci/controller/plda/pcie-microchip-host.c >> >> @@ -821,13 +821,15 @@ static const struct plda_event_ops mc_event_ops = { >> >> }; >> >> >> >> static const struct plda_event mc_event = { >> >> + .domain_ops = &mc_event_domain_ops, >> >> .event_ops = &mc_event_ops, >> >> .request_event_irq = mc_request_event_irq, >> >> .intx_event = EVENT_LOCAL_PM_MSI_INT_INTX, >> >> .msi_event = EVENT_LOCAL_PM_MSI_INT_MSI, >> >> }; >> >> >> >> -static int plda_pcie_init_irq_domains(struct plda_pcie_rp *port) >> >> +static int plda_pcie_init_irq_domains(struct plda_pcie_rp *port, >> >> + const struct irq_domain_ops *ops) >> >> { >> >> struct device *dev = port->dev; >> >> struct device_node *node = dev->of_node; >> >> @@ -941,7 +943,7 @@ static int plda_init_interrupts(struct platform_device *pdev, >> >> return -EINVAL; >> >> } >> >> >> >> - ret = plda_pcie_init_irq_domains(port); >> >> + ret = plda_pcie_init_irq_domains(port, event->domain_ops); >> >> if (ret) { >> >> dev_err(dev, "failed creating IRQ domains\n"); >> >> return ret; >> >> diff --git a/drivers/pci/controller/plda/pcie-plda.h b/drivers/pci/controller/plda/pcie-plda.h >> >> index df1729095952..820ea16855b5 100644 >> >> --- a/drivers/pci/controller/plda/pcie-plda.h >> >> +++ b/drivers/pci/controller/plda/pcie-plda.h >> >> @@ -129,6 +129,7 @@ struct plda_pcie_rp { >> >> }; >> >> >> >> struct plda_event { >> >> + const struct irq_domain_ops *domain_ops; >> >> const struct plda_event_ops *event_ops; >> >> int (*request_event_irq)(struct plda_pcie_rp *pcie, >> >> int event_irq, int event); >> >> -- >> >> 2.17.1 >> >>