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From:   =?UTF-8?q?Cl=C3=A9ment=20L=C3=A9ger?= <cleger@rivosinc.com>
To:     linux-doc@vger.kernel.org, linux-riscv@lists.infradead.org,
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Cc:     =?UTF-8?q?Cl=C3=A9ment=20L=C3=A9ger?= <cleger@rivosinc.com>,
        Jonathan Corbet <corbet@lwn.net>,
        Paul Walmsley <paul.walmsley@sifive.com>,
        Palmer Dabbelt <palmer@dabbelt.com>,
        Albert Ou <aou@eecs.berkeley.edu>,
        Conor Dooley <conor@kernel.org>,
        Rob Herring <robh+dt@kernel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
        Robbin Ehn <rehn@rivosinc.com>
Subject: [PATCH 0/9] riscv: hwprobe: add Zicond, Zam, Zacas and Ztso support
Date:   Wed, 13 Dec 2023 12:32:56 +0100
Message-ID: <20231213113308.133176-1-cleger@rivosinc.com>
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Precedence: bulk

This series add support for a few more extensions that are present in
the RVA22U64/RVA23U64 (either mandatory or optional) and that are useful
for userspace:
- Zicond
- Zam
- Zacas
- Ztso

Series currently based on riscv/for-next.

Clément Léger (9):
  riscv: add ISA extension parsing for Ztso
  riscv: hwprobe: export Ztso ISA extension
  dt-bindings: riscv: add Zam ISA extension description
  riscv: add ISA extension parsing for Zam
  riscv: hwprobe: export Zam ISA extension
  dt-bindings: riscv: add Zacas ISA extension description
  riscv: add ISA extension parsing for Zacas
  riscv: hwprobe: export Zacas ISA extension
  riscv: hwprobe: export Zicond extension

 Documentation/arch/riscv/hwprobe.rst             | 16 ++++++++++++++++
 .../devicetree/bindings/riscv/extensions.yaml    | 11 +++++++++++
 arch/riscv/include/asm/hwcap.h                   |  3 +++
 arch/riscv/include/uapi/asm/hwprobe.h            |  4 ++++
 arch/riscv/kernel/cpufeature.c                   |  3 +++
 arch/riscv/kernel/sys_riscv.c                    |  4 ++++
 6 files changed, 41 insertions(+)

-- 
2.43.0