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Wed, 13 Dec 2023 04:00:29 -0800 (PST) X-Received: by 2002:a05:620a:1d97:b0:77d:88cc:e759 with SMTP id pj23-20020a05620a1d9700b0077d88cce759mr9425929qkn.44.1702468829479; Wed, 13 Dec 2023 04:00:29 -0800 (PST) Received: from 348282803490 named unknown by gmailapi.google.com with HTTPREST; Wed, 13 Dec 2023 04:00:29 -0800 From: Emil Renner Berthing In-Reply-To: <56031a2fadf442e297b1e0ea03777e5f@EXMBX066.cuchost.com> References: <20231206115000.295825-1-jeeheng.sia@starfivetech.com> <20231206115000.295825-8-jeeheng.sia@starfivetech.com> <56031a2fadf442e297b1e0ea03777e5f@EXMBX066.cuchost.com> Mime-Version: 1.0 Date: Wed, 13 Dec 2023 04:00:29 -0800 Message-ID: Subject: RE: [PATCH v1 07/16] dt-bindings: clock: Add StarFive JH8100 System-North-West clock and reset generator To: JeeHeng Sia , Emil Renner Berthing , "kernel@esmil.dk" , "conor@kernel.org" , "robh+dt@kernel.org" , "krzysztof.kozlowski+dt@linaro.org" , "paul.walmsley@sifive.com" , "palmer@dabbelt.com" , "aou@eecs.berkeley.edu" , "mturquette@baylibre.com" , "sboyd@kernel.org" , "p.zabel@pengutronix.de" , Hal Feng , Xingyu Wu Cc: "linux-riscv@lists.infradead.org" , "devicetree@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "linux-clk@vger.kernel.org" , Leyfoon Tan Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (snail.vger.email [0.0.0.0]); Wed, 13 Dec 2023 04:00:45 -0800 (PST) JeeHeng Sia wrote: > > -----Original Message----- > > From: Emil Renner Berthing > > Sent: Saturday, December 9, 2023 12:37 AM > > To: JeeHeng Sia ; kernel@esmil.dk; conor@= kernel.org; robh+dt@kernel.org; > > krzysztof.kozlowski+dt@linaro.org; paul.walmsley@sifive.com; palmer@dab= belt.com; aou@eecs.berkeley.edu; > > mturquette@baylibre.com; sboyd@kernel.org; p.zabel@pengutronix.de; emil= .renner.berthing@canonical.com; Hal Feng > > ; Xingyu Wu > > Cc: linux-riscv@lists.infradead.org; devicetree@vger.kernel.org; linux-= kernel@vger.kernel.org; linux-clk@vger.kernel.org; Leyfoon Tan > > > > Subject: Re: [PATCH v1 07/16] dt-bindings: clock: Add StarFive JH8100 S= ystem-North-West clock and reset generator > > > > Sia Jee Heng wrote: > > > Add bindings for the System-North-West clock and reset generator > > > (SYSCRG-NW) on JH8100 SoC. > > > > > > Signed-off-by: Sia Jee Heng > > > Reviewed-by: Ley Foon Tan > > > --- > > > .../clock/starfive,jh8100-syscrg-nw.yaml | 119 ++++++++++++++++= ++ > > > > The JH7110 clocks, the JH8100 system and always-on all follow the Xcrg = pattern: > > syscrg > > aoncrg > > stgcrg > > ispcrg > > voutcrg > > etc. > > > > Is there a reason the north-west, north-east and south-west breaks this= pattern? > > I'd have expected them to be called something like > > nwcrg, JH8100_NWCLK_*, JH8100_NWRST_*, > > necrg, JH8100_NECLK_*, JH8100_NERST_* and > > swcrg, JH8100_SWCLK_*, JH8100_SWRST_* > > > > Just like all the other Starfive drivers. > Understood your concern. We don=E2=80=99t have the intention to break the= pattern, > but the reason we skip the SoC_ prefix is that the SoC names were already > defined in the header file with the SoC name. > However, I can put it back, of course. Yes, all these 3 JHXX00 drivers are almost identical. There should be no re= ason to name any one of them differently. Having them all be as similar as possi= ble will make it a lot easier to maintain in the future. If you don't like a pattern then please change it for all the similar drivers and don't make ju= st one of them be different. /Emil