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charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Spam-Status: No, score=-0.9 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on agentk.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (agentk.vger.email [0.0.0.0]); Wed, 13 Dec 2023 04:02:34 -0800 (PST) On Wed, Dec 13, 2023 at 5:29=E2=80=AFPM Dario Binacchi wrote: > > Hi Jagan and Dave, > > On Wed, Dec 6, 2023 at 2:57=E2=80=AFPM Michael Nazzareno Trimarchi > wrote: > > > > Hi Jagan > > > > On Wed, Dec 6, 2023 at 2:31=E2=80=AFPM Jagan Teki wrote: > > > > > > Hi Dario, > > > > > > On Wed, Dec 6, 2023 at 6:57=E2=80=AFPM Dario Binacchi > > > wrote: > > > > > > > > Hi Dave and Jagan, > > > > > > > > On Tue, Dec 5, 2023 at 4:39=E2=80=AFPM Dave Stevenson > > > > wrote: > > > > > > > > > > Hi Dario > > > > > > > > > > On Tue, 5 Dec 2023 at 10:54, Dario Binacchi > > > > > wrote: > > > > > > > > > > > > The patch fixes the code for finding the next bridge with the > > > > > > "pre_enable_prev_first" flag set to false. In case this conditi= on is > > > > > > not verified, i. e. there is no subsequent bridge with the flag= set to > > > > > > false, the whole bridge list is traversed, invalidating the "ne= xt" > > > > > > variable. > > > > > > > > > > > > The use of a new iteration variable (i. e. "iter") ensures that= the value > > > > > > of the "next" variable is not invalidated. > > > > > > > > > > We already have https://patchwork.freedesktop.org/patch/529288/ t= hat > > > > > has been reviewed (but not applied) to resolve this. What does th= is > > > > > version do differently and why? > > > > > > > > My patches only affect drm_atomic_bridge_chain_post_disable(), wher= eas > > > > Jagan's patch affects both > > > > drm_atomic_bridge_chain_post_disable() and drm_atomic_bridge_chain_= pre_enable(). > > > > I tested Jagan's patch on my system with success and I reviewed wit= h > > > > Michael Trimarchi the > > > > drm_atomic_bridge_chain_pre_enable() fixing and we think it's okay. > > > > We also believe that our changes to post_disable() are better, as w= e > > > > set the 'next' variable only when required, > > > > and the code is more optimized since the list_is_last() is not call= ed > > > > within the loop. > > > > Would it be possible to use Jagan's patch for fixing > > > > drm_atomic_bridge_chain_pre_enable() and mine for > > > > fixing drm_atomic_bridge_chain_post_disable()? > > > > > > > > > > Can you please share the post-disabled bridge chain list with the > > > below example before and after your change? > > > > We have already git commit the description in how the patch affects > > the post_disable. As Dario > > reported your patch is ok even in our use case. We don't have a real > > use case as the one you describe. > > > > Can we know how you test it in this use case here? Can you test our > > patches of post_disable? > > > > Thanks > > Michael > > > > > > > > Example: > > > - Panel > > > - Bridge 1 > > > - Bridge 2 pre_enable_prev_first > > > - Bridge 3 > > > - Bridge 4 pre_enable_prev_first > > > - Bridge 5 pre_enable_prev_first > > > - Bridge 6 > > > - Encoder > > > > > > Thanks, > > > Jagan. > > Starting from my use case: > > # cat /sys/kernel/debug/dri/32e00000.lcdif/bridge_chains > encoder[36] > bridge[0] type: 16, ops: 0x0, OF: > /soc@0/bus@32c00000/dsi@32e10000:fsl,imx8mn-mipi-dsim > bridge[1] type: 16, ops: 0x8, OF: > /soc@0/bus@32c00000/dsi@32e10000/panel@0:sharp,ls068b3sx0 > > I developed a pass through MIPI-DSI bridge driver to try to test your cas= e: > # cat /sys/kernel/debug/dri/32e00000.lcdif/bridge_chains > encoder[36] > bridge[0] type: 16, ops: 0x0, OF: > /soc@0/bus@32c00000/dsi@32e10000:fsl,imx8mn-mipi-dsim > bridge[1] type: 16, ops: 0x0, OF: /pt_mipi_dsi1:amarula,pt-mipi-dsi > bridge[2] type: 16, ops: 0x0, OF: /pt_mipi_dsi2:amarula,pt-mipi-dsi > bridge[3] type: 16, ops: 0x0, OF: /pt_mipi_dsi3:amarula,pt-mipi-dsi > bridge[4] type: 16, ops: 0x0, OF: /pt_mipi_dsi4:amarula,pt-mipi-dsi > bridge[5] type: 16, ops: 0x0, OF: /pt_mipi_dsi5:amarula,pt-mipi-dsi > bridge[6] type: 16, ops: 0x8, OF: /pt_mipi_dsi5/panel@0:sharp,ls068b3sx02 > > The pre_enable_prev_first flag is set through the > "amarula,pre_enable_prev_first" dts property I put > in my dts. > Your and my patches give the same results (result: OK) in both your > use case and mine. > But If I test my new "enlarged" use case: > > - Encoder > - bridge[0] (samsung-dsim) > - bridge[1] pre_enable_prev_first > - bridge[2] pre_enable_prev_first > - bridge[3] pre_enable_prev_first > - bridge[4] pre_enable_prev_first > - bridge[5] pre_enable_prev_first > - bridge[6] pre_enable_prev_first (Panel) > > the result is: > my patches: KO > your patch: OK > > So, I will remove my patches from the series. > > Can the driver I implemented to test the use cases (pass through > MIPI-DSI) be considered useful for testing these > bridge pipelines? > Does it make sense to send its patch? I don't think so, I have a similar test bench for chain of bridges. I will try to re-create the chain and update the result. Jagan.