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(cola.collaboradmins.com [195.201.22.229]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: ehristev) by madrid.collaboradmins.com (Postfix) with ESMTPSA id 396543781488; Wed, 13 Dec 2023 12:20:31 +0000 (UTC) From: Eugen Hristev To: linux-media@vger.kernel.org, devicetree@vger.kernel.org, linux-mediatek@lists.infradead.org Cc: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, angelogioacchino.delregno@collabora.com, kernel@collabora.com, eugen.hristev@collabora.com, tiffany.lin@mediatek.com, andrew-ct.chen@mediatek.com, matthias.bgg@gmail.com, Kyrie Wu , Allen-KH Cheng , Hsin-Yi Wang Subject: [PATCH 4/4] arm64: dts: mediatek: mt8186: Add venc node Date: Wed, 13 Dec 2023 14:20:17 +0200 Message-Id: <20231213122017.102100-4-eugen.hristev@collabora.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231213122017.102100-1-eugen.hristev@collabora.com> References: <20231213122017.102100-1-eugen.hristev@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-0.9 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on agentk.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (agentk.vger.email [0.0.0.0]); Wed, 13 Dec 2023 04:21:02 -0800 (PST) From: Kyrie Wu Add video encoder node. Signed-off-by: Kyrie Wu Signed-off-by: Allen-KH Cheng Reviewed-by: Hsin-Yi Wang [eugen.hristev@collabora.com: minor cleanup] Signed-off-by: Eugen Hristev --- arch/arm64/boot/dts/mediatek/mt8186.dtsi | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8186.dtsi b/arch/arm64/boot/dts/mediatek/mt8186.dtsi index 66ead3f23336..8535ff2b44e9 100644 --- a/arch/arm64/boot/dts/mediatek/mt8186.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8186.dtsi @@ -1993,6 +1993,30 @@ larb7: smi@17010000 { power-domains = <&spm MT8186_POWER_DOMAIN_VENC>; }; + venc: venc@17020000 { + compatible = "mediatek,mt8183-vcodec-enc"; + #address-cells = <2>; + #size-cells = <2>; + reg = <0 0x17020000 0 0x2000>; + interrupts = ; + iommus = <&iommu_mm IOMMU_PORT_L7_VENC_RCPU>, + <&iommu_mm IOMMU_PORT_L7_VENC_REC>, + <&iommu_mm IOMMU_PORT_L7_VENC_BSDMA>, + <&iommu_mm IOMMU_PORT_L7_VENC_SV_COMV>, + <&iommu_mm IOMMU_PORT_L7_VENC_RD_COMV>, + <&iommu_mm IOMMU_PORT_L7_VENC_CUR_LUMA>, + <&iommu_mm IOMMU_PORT_L7_VENC_CUR_CHROMA>, + <&iommu_mm IOMMU_PORT_L7_VENC_REF_LUMA>, + <&iommu_mm IOMMU_PORT_L7_VENC_REF_CHROMA>; + dma-ranges = <0x1 0x0 0x1 0x0 0x1 0x0>; + mediatek,scp = <&scp>; + clocks = <&vencsys CLK_VENC_CKE1_VENC>; + clock-names = "MT_CG_VENC"; + assigned-clocks = <&topckgen CLK_TOP_VENC>; + assigned-clock-parents = <&topckgen CLK_TOP_UNIVPLL_D3>; + power-domains = <&spm MT8186_POWER_DOMAIN_VENC>; + }; + camsys: clock-controller@1a000000 { compatible = "mediatek,mt8186-camsys"; reg = <0 0x1a000000 0 0x1000>; -- 2.34.1