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[23.128.96.36]) by mx.google.com with ESMTPS id z11-20020a170903018b00b001d07d6916f4si2638912plg.592.2023.12.13.05.40.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 13 Dec 2023 05:40:19 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.36 as permitted sender) client-ip=23.128.96.36; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.36 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by pete.vger.email (Postfix) with ESMTP id 05ADA81904E7; Wed, 13 Dec 2023 05:40:17 -0800 (PST) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.11 at pete.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1379275AbjLMNkD (ORCPT + 99 others); Wed, 13 Dec 2023 08:40:03 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59362 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1379263AbjLMNkB (ORCPT ); Wed, 13 Dec 2023 08:40:01 -0500 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.10]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C471295; Wed, 13 Dec 2023 05:40:06 -0800 (PST) X-IronPort-AV: E=McAfee;i="6600,9927,10922"; a="8323973" X-IronPort-AV: E=Sophos;i="6.04,272,1695711600"; d="scan'208";a="8323973" Received: from orsmga005.jf.intel.com ([10.7.209.41]) by orvoesa102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Dec 2023 05:40:06 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10922"; a="947187477" X-IronPort-AV: E=Sophos;i="6.04,272,1695711600"; d="scan'208";a="947187477" Received: from smile.fi.intel.com ([10.237.72.54]) by orsmga005.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Dec 2023 05:40:03 -0800 Received: from andy by smile.fi.intel.com with local (Exim 4.97) (envelope-from ) id 1rDPSy-00000005XLb-3sqy; Wed, 13 Dec 2023 15:40:00 +0200 Date: Wed, 13 Dec 2023 15:40:00 +0200 From: Andy Shevchenko To: =?utf-8?B?VFlfQ2hhbmdb5by15a2Q6YC4XQ==?= Cc: Linus Walleij , Bartosz Golaszewski , Rob Herring , Krzysztof Kozlowski , Conor Dooley , "linux-gpio@vger.kernel.org" , "devicetree@vger.kernel.org" , "linux-kernel@vger.kernel.org" Subject: Re: [PATCH v3 2/2] Add GPIO support for Realtek DHC(Digital Home Center) RTD SoCs. Message-ID: References: <20231207100723.15015-1-tychang@realtek.com> <20231207100723.15015-3-tychang@realtek.com> <989146448858478b975c66899b8f3fed@realtek.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <989146448858478b975c66899b8f3fed@realtek.com> Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo X-Spam-Status: No, score=-1.0 required=5.0 tests=MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on pete.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (pete.vger.email [0.0.0.0]); Wed, 13 Dec 2023 05:40:17 -0800 (PST) On Tue, Dec 12, 2023 at 09:55:59AM +0000, TY_Chang[張子逸] wrote: > >On Thu, Dec 07, 2023 at 06:07:23PM +0800, TY Chang wrote: ... > >> This driver enables configuration of GPIO direction, GPIO values, GPIO > >> debounce settings and handles GPIO interrupts. > > > >Why gpio-regmap can't be used? > > I will try to use gpio-remap in the next version. If it appears that it makes code uglier / complicated, please add the note somewhere to answer the above question. ... > >> + if (index > data->info->num_dir) > >> + return -EINVAL; > > > >When this conditional can be true? > >Same Q to the similar checks over the code. > > It is only to check if the offset value is missing in the rtd_gpio_info. > I'm uncertain about the necessity of these checks. If they are not necessary, > I will remove the num_* members in the rtd_gpio_info structure along with > these checks. My understanding that these checks are equivalent to the if (offset >= ngpio) one, which is performed by GPIO library, i.o.w. you will never get an offset outside the range of supported GPIO lines. If my understanding is wrong, these checks need a comment why. ... > >> + if (irq == data->irqs[0]) > >> + get_reg_offset = &rtd_gpio_gpa_offset; > >> + else if (irq == data->irqs[1]) > >> + get_reg_offset = &rtd_gpio_gpda_offset; > > > >Can't it be done before entering into chained IRQ handler? > > I will revise it. Thinking about this more, perhaps you can register two IRQ chips with different functions, so this won't be part of the very critical interrupt handler (as we all want to reduce overhead in it as much as possible). Anyway, think about this and try different options, choose the one you think the best. -- With Best Regards, Andy Shevchenko