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Date:   Wed, 13 Dec 2023 19:25:14 +0530
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Subject: Re: [PATCH V2 4/5] perf mem: Clean up perf_mem_event__supported()
To:     Leo Yan <leo.yan@linaro.org>,
        "Liang, Kan" <kan.liang@linux.intel.com>
Cc:     acme@kernel.org, irogers@google.com, peterz@infradead.org,
        mingo@redhat.com, namhyung@kernel.org, jolsa@kernel.org,
        adrian.hunter@intel.com, john.g.garry@oracle.com, will@kernel.org,
        james.clark@arm.com, mike.leach@linaro.org,
        yuhaixin.yhx@linux.alibaba.com, renyu.zj@linux.alibaba.com,
        tmricht@linux.ibm.com, linux-kernel@vger.kernel.org,
        linux-perf-users@vger.kernel.org,
        linux-arm-kernel@lists.infradead.org,
        Ravi Bangoria <ravi.bangoria@amd.com>
References: <20231207192338.400336-1-kan.liang@linux.intel.com>
 <20231207192338.400336-5-kan.liang@linux.intel.com>
 <20231209061723.GC2116834@leoy-yangtze.lan>
 <2865c1b4-a003-44df-a734-1e1c90bfa14d@linux.intel.com>
 <20231213134911.GB3895246@leoy-yangtze.lan>
Content-Language: en-US
From:   Ravi Bangoria <ravi.bangoria@amd.com>
In-Reply-To: <20231213134911.GB3895246@leoy-yangtze.lan>
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>>>> For some ARCHs, e.g., ARM and AMD, to get the availability of the
>>>> mem-events, perf checks the existence of a specific PMU. For the other
>>>> ARCHs, e.g., Intel and Power, perf has to check the existence of some
>>>> specific events.
>>>>
>>>> The current perf only iterates the mem-events-supported PMUs. It's not
>>>> required to check the existence of a specific PMU anymore.
>>>
>>> With this change, both Arm and AMD archs have no chance to detect if the
>>> hardware (or the device driver) is supported and the tool will always
>>> take the memory events are exited on the system, right?
>>
>> Currently, the Arm and AMD only check the specific PMU. If the PMU is
>> detected, the memory events are supported. The patch set doesn't change
>> it. It just moves the check to perf_pmu__arch_init(). When the specific
>> PMU is initialized, the mem_events is assigned. You don't need to do
>> runtime sysfs check. It should be an improvement for ARM and AMD.
> 
> Okay, I understand now.  For Arm SPE, it has a dedicated PMU so if the
> PMU is detected, then we can assume the memory events are supported.

Same for AMD. If ibs_op// pmu is present, the mem event is supported.

Thanks,
Ravi