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Wed, 13 Dec 2023 09:24:24 -0600 Received: from DFLE113.ent.ti.com (10.64.6.34) by DFLE105.ent.ti.com (10.64.6.26) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Wed, 13 Dec 2023 09:24:23 -0600 Received: from lelvsmtp6.itg.ti.com (10.180.75.249) by DFLE113.ent.ti.com (10.64.6.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Wed, 13 Dec 2023 09:24:23 -0600 Received: from localhost ([10.250.64.83]) by lelvsmtp6.itg.ti.com (8.15.2/8.15.2) with ESMTP id 3BDFOMBp108038; Wed, 13 Dec 2023 09:24:23 -0600 Date: Wed, 13 Dec 2023 20:54:21 +0530 From: Jai Luthra To: "Raghavendra, Vignesh" CC: "Menon, Nishanth" , Tero Kristo , Rob Herring , Krzysztof Kozlowski , Conor Dooley , "linux-arm-kernel@lists.infradead.org" , "devicetree@vger.kernel.org" , "linux-kernel@vger.kernel.org" Subject: Re: [PATCH v2 0/3] arm64: dts: ti: k3: Add additioal regs for DMA components Message-ID: References: <20231213135138.929517-1-vigneshr@ti.com> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="ynjgdttbw44iiykq" Content-Disposition: inline In-Reply-To: <20231213135138.929517-1-vigneshr@ti.com> X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-Spam-Status: No, score=-0.9 required=5.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on howler.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (howler.vger.email [0.0.0.0]); Wed, 13 Dec 2023 07:25:23 -0800 (PST) --ynjgdttbw44iiykq Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable Hi Vignesh, On Dec 13, 2023 at 19:21:35 +0530, Raghavendra, Vignesh wrote: > This adds additional reg ranges which are not directly used by Linux but > by other components like U-Boot >=20 > Binding is accepted via dmaengine tree and is in linux-next[0] >=20 > [0] https://lore.kernel.org/dmaengine/170083278148.771517.184188915617441= 3563.b4-ty@kernel.org/ >=20 > v2: > Extend register ranges to match TRM as pointed out by Jai For the series, Reviewed-by: Jai Luthra >=20 > v1: https://lore.kernel.org/linux-arm-kernel/20231212111634.3515175-1-vig= neshr@ti.com/ >=20 > Manorit Chawdhry (2): > arm64: dts: ti: k3-am65: Add additional regs for DMA components > arm64: dts: ti: k3-j7*: Add additional regs for DMA components >=20 > Vignesh Raghavendra (1): > arm64: dts: ti: k3-am6*: Add additional regs for DMA components >=20 > arch/arm64/boot/dts/ti/k3-am62-main.dtsi | 18 ++++++++++++++---- > arch/arm64/boot/dts/ti/k3-am62a-main.dtsi | 18 ++++++++++++++---- > arch/arm64/boot/dts/ti/k3-am62p-main.dtsi | 18 ++++++++++++++---- > arch/arm64/boot/dts/ti/k3-am64-main.dtsi | 18 ++++++++++++++---- > arch/arm64/boot/dts/ti/k3-am65-main.dtsi | 8 ++++++-- > arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi | 8 ++++++-- > arch/arm64/boot/dts/ti/k3-j7200-main.dtsi | 8 ++++++-- > .../arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi | 8 ++++++-- > arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | 8 ++++++-- > .../arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi | 8 ++++++-- > arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi | 8 ++++++-- > .../boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi | 8 ++++++-- > arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi | 8 ++++++-- > .../boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi | 8 ++++++-- > 14 files changed, 116 insertions(+), 36 deletions(-) >=20 > --=20 > 2.43.0 >=20 --=20 Thanks, Jai GPG Fingerprint: 4DE0 D818 E5D5 75E8 D45A AFC5 43DE 91F9 249A 7145 --ynjgdttbw44iiykq Content-Type: application/pgp-signature; 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