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[23.128.96.38]) by mx.google.com with ESMTPS id i13-20020a170902c94d00b001d0b31591d2si9756262pla.476.2023.12.13.08.29.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 13 Dec 2023 08:29:07 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.38 as permitted sender) client-ip=23.128.96.38; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.38 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by fry.vger.email (Postfix) with ESMTP id 4ABCC8057D8F; Wed, 13 Dec 2023 08:29:05 -0800 (PST) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.11 at fry.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233489AbjLMQ2s (ORCPT + 99 others); Wed, 13 Dec 2023 11:28:48 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50898 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233264AbjLMQ2q (ORCPT ); Wed, 13 Dec 2023 11:28:46 -0500 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 514D2B9 for ; Wed, 13 Dec 2023 08:28:52 -0800 (PST) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id B1E6BC15; Wed, 13 Dec 2023 08:29:37 -0800 (PST) Received: from [10.57.45.12] (unknown [10.57.45.12]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 7B4F33F738; Wed, 13 Dec 2023 08:28:50 -0800 (PST) Message-ID: <68d6f2bb-3c18-4dce-ba32-6925955dcc35@arm.com> Date: Wed, 13 Dec 2023 16:28:49 +0000 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 1/8] coresight: Fix issue where a source device's helpers aren't disabled Content-Language: en-GB To: James Clark , coresight@lists.linaro.org Cc: Mike Leach , Alexander Shishkin , Maxime Coquelin , Alexandre Torgue , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com References: <20231212155407.1429121-1-james.clark@arm.com> <20231212155407.1429121-2-james.clark@arm.com> <3c7665ff-b2e2-f10d-a78a-4ddc1791926f@arm.com> From: Suzuki K Poulose In-Reply-To: <3c7665ff-b2e2-f10d-a78a-4ddc1791926f@arm.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-0.8 required=5.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on fry.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (fry.vger.email [0.0.0.0]); Wed, 13 Dec 2023 08:29:05 -0800 (PST) On 13/12/2023 13:54, James Clark wrote: > > > On 12/12/2023 17:44, Suzuki K Poulose wrote: >> Hi James >> >> On 12/12/2023 15:53, James Clark wrote: >>> The linked commit reverts the change that accidentally used some sysfs >>> enable/disable functions from Perf which broke the refcounting, but it >>> also removes the fact that the sysfs disable function disabled the >>> helpers. >> >> >>> >>> Add a new wrapper function that does both which is used by both Perf and >>> sysfs, and label the sysfs disable function appropriately. The naming of >>> all of the functions will be tidied up later to avoid this happening >>> again. >>> >>> Fixes: 287e82cf69aa ("coresight: Fix crash when Perf and sysfs modes >>> are used concurrently") >> >> But we still don't "enable" the helpers from perf mode with this patch. >> i.e., we use source_ops()->enable directly. So, I guess this patch >> doesn't fix a bug as such. But that said, it would be good to >> enable/disable helpers for sources, in perf mode. >> >> Suzuki > > We do, it happens in coresight_enable_path() which Perf uses. I added > the comment below about that. Ah, I see. That indeed is a bit confusing. And I think all users of coresight_enable_path() enables the source right after. So, I don't see any point in having it separate. That said, this fix makes sense and apologies for the confusion. We could may be cleanup the enable_path() to enable the source too, in a separate patch. Suzuki > > [...] > >>>   +/* >>> + * Helper function to call source_ops(csdev)->disable and also >>> disable the >>> + * helpers. >>> + * >>> + * There is an imbalance between coresight_enable_path() and >>> + * coresight_disable_path(). Enabling also enables the source's >>> helpers as part >>> + * of the path, but disabling always skips the first item in the path >>> (which is >>> + * the source), so sources and their helpers don't get disabled as >>> part of that >>> + * function and we need the extra step here. >>> + */ > > The reason coresight_disable_path() skips the first item is because it's > used after errors where a path is only partially enabled and it unwinds, > skipping the last item, because the last item didn't enable. > > It seemed a bit more intrusive to change that, and it's already working.