Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:5 as permitted sender) client-ip=2620:137:e000::3:5;
From:   Heiko Stuebner <heiko@sntech.de>
To:     mripard@kernel.org, airlied@gmail.com,
        Farouk Bouabid <farouk.bouabid@theobroma-systems.com>,
        maarten.lankhorst@linux.intel.com, neil.armstrong@linaro.org,
        sam@ravnborg.org, quentin.schulz@theobroma-systems.com,
        daniel@ffwll.ch, quic_jesszhan@quicinc.com, tzimmermann@suse.de
Cc:     Heiko Stuebner <heiko@sntech.de>, linux-kernel@vger.kernel.org,
        dri-devel@lists.freedesktop.org, victor.liu@nxp.com
Subject: Re: [PATCH] drm/panel: ltk050h3146w: Set burst mode for ltk050h3148w
Date:   Wed, 13 Dec 2023 18:44:01 +0100
Message-Id: <170248942758.833086.13775590933211922845.b4-ty@sntech.de>
In-Reply-To: <20231213145045.41020-1-farouk.bouabid@theobroma-systems.com>
References: <20231213145045.41020-1-farouk.bouabid@theobroma-systems.com>
MIME-Version: 1.0
Content-Type: text/plain; charset="utf-8"
Content-Transfer-Encoding: 8bit
Precedence: bulk

On Wed, 13 Dec 2023 15:50:45 +0100, Farouk Bouabid wrote:
> The ltk050h3148w variant expects the horizontal component lane byte clock
> cycle(lbcc) to be calculated using lane_mbps (burst mode) instead of the
> pixel clock.
> Using the pixel clock rate by default for this calculation was introduced
> in commit ac87d23694f4 ("drm/bridge: synopsys: dw-mipi-dsi: Use pixel clock
> rate to calculate lbcc") and starting from commit 93e82bb4de01
> ("drm/bridge: synopsys: dw-mipi-dsi: Fix hcomponent lbcc for burst mode")
> only panels that support burst mode can keep using the lane_mbps. So add
> MIPI_DSI_MODE_VIDEO_BURST as part of the mode_flags for the dsi host.
> 
> [...]

Applied, thanks!

[1/1] drm/panel: ltk050h3146w: Set burst mode for ltk050h3148w
      commit: 6c9dbee84cd005bed5f9d07b3a2797ae6414b435

Best regards,
-- 
Heiko Stuebner <heiko@sntech.de>