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[23.128.96.34]) by mx.google.com with ESMTPS id b14-20020a17090a7ace00b002861c962e15si9997297pjl.15.2023.12.13.10.37.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 13 Dec 2023 10:37:29 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.34 as permitted sender) client-ip=23.128.96.34; Authentication-Results: mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=fIdZb9Zb; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.34 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by howler.vger.email (Postfix) with ESMTP id 460AA80ACFD4; Wed, 13 Dec 2023 10:37:27 -0800 (PST) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.11 at howler.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233264AbjLMShN (ORCPT + 99 others); Wed, 13 Dec 2023 13:37:13 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43486 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229671AbjLMShL (ORCPT ); Wed, 13 Dec 2023 13:37:11 -0500 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.9]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 67EE2AB for ; Wed, 13 Dec 2023 10:37:18 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1702492638; x=1734028638; h=date:from:to:cc:subject:message-id:references: mime-version:in-reply-to; bh=EOhMcZbrvHstdBAULniZzSThfnXX++EnI56G1uShkgc=; b=fIdZb9ZbdyXWiYCE9jNQonZa1028zhwzNqjWvOiIJ2LZfqfGdHOxAS0p biiYKpqSa3i+sTGo+H7dZGY89A0hZCGSeUAtAgobdPaHjnuYgSRr9IND2 76lVk4cONGP+SgSDQF8vVsWyzV5yG5HQBQlZr/uECZvZVqpM/P2e+4tMN Wxe82oVV/65W0LAjDrcMIzwIX5OAalMkzCfMFaInGnXM60soU92fUJnDi QD/4qIuWKYFDtEvpEk2aJ1wjMBNDyVaZ+hq5Ky2sgUcNC3xQ31dr74GMq MlSeQK+PrGXWqMwiy1MQHMgn8b1pDTNFkoccp2Zg1NsYGDklKp7kdyHU7 w==; X-IronPort-AV: E=McAfee;i="6600,9927,10923"; a="13706839" X-IronPort-AV: E=Sophos;i="6.04,273,1695711600"; d="scan'208";a="13706839" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by orvoesa101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Dec 2023 10:37:18 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10923"; a="839986312" X-IronPort-AV: E=Sophos;i="6.04,273,1695711600"; d="scan'208";a="839986312" Received: from smile.fi.intel.com ([10.237.72.54]) by fmsmga008.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Dec 2023 10:37:14 -0800 Received: from andy by smile.fi.intel.com with local (Exim 4.97) (envelope-from ) id 1rDU6Z-00000005bto-03zh; Wed, 13 Dec 2023 20:37:11 +0200 Date: Wed, 13 Dec 2023 20:37:10 +0200 From: Andy Shevchenko To: Nikita Shubin Cc: Conor Dooley , Ulf Hansson , Joel Stanley , Walker Chen , Jonathan =?iso-8859-1?Q?Neusch=E4fer?= , Huisong Li , Arnd Bergmann , Wei Xu , Emil Renner Berthing , Linus Walleij , Alexander Sverdlin , Hal Feng , linux-kernel@vger.kernel.org Subject: Re: [PATCH v6 08/40] soc: Add SoC driver for Cirrus ep93xx Message-ID: References: <20231212-ep93xx-v6-0-c307b8ac9aa8@maquefel.me> <20231212-ep93xx-v6-8-c307b8ac9aa8@maquefel.me> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20231212-ep93xx-v6-8-c307b8ac9aa8@maquefel.me> Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo X-Spam-Status: No, score=-0.9 required=5.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on howler.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (howler.vger.email [0.0.0.0]); Wed, 13 Dec 2023 10:37:27 -0800 (PST) On Tue, Dec 12, 2023 at 11:20:25AM +0300, Nikita Shubin wrote: > Add an SoC driver for the ep93xx. Currently there is only one thing > not fitting into any other framework, and that is the swlock setting. ... > +/* > + * SoC driver for Cirrus EP93xx chips. > + * Copyright (C) 2022 Nikita Shubin > + * > + * Based on a rewrite of arch/arm/mach-ep93xx/core.c > + * Copyright (C) 2006 Lennert Buytenhek > + * Copyright (C) 2007 Herbert Valerio Riedel > + * > + * Thanks go to Michael Burian and Ray Lehtiniemi for their key > + * role in the ep93xx Linux community Missing period. > + */ ... > +#include > +#include > +#include > +#include > +#include > +#include Isn't this an incorrect header and should be auxiliary one? > +#include > +#include + spinlock.h ? But since it's a new code, why not cleanup.h? > +#include ... > + enum ep93xx_soc_model model = (int)(uintptr_t)of_device_get_match_data(&pdev->dev); int? Maybe strict device *dev = &pdev->dev; enum ep93xx_soc_model model; ... model = (enum ep93xx_soc_model)(uintptr_t)device_get_match_data(dev); ? ... > + struct device *dev = &pdev->dev; Ah you even have this already! ... > + dev_info(dev, "EP93xx SoC revision %s\n", attrs->revision); Hmm... Is this message anyhow useful? -- With Best Regards, Andy Shevchenko