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[66.90.144.107]) by smtp.gmail.com with ESMTPSA id l3-20020a056808020300b003b8388ffaffsm3049163oie.41.2023.12.13.10.40.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 13 Dec 2023 10:40:12 -0800 (PST) Received: (nullmailer pid 1698665 invoked by uid 1000); Wed, 13 Dec 2023 18:40:11 -0000 Date: Wed, 13 Dec 2023 12:40:11 -0600 From: Rob Herring To: Krzysztof Kozlowski Cc: Abel Vesa , Iskren Chernev , Shawn Guo , Rajendra Nayak , Srinivas Kandagatla , devicetree@vger.kernel.org, Danila Tikhonov , linux-gpio@vger.kernel.org, Konrad Dybcio , Rohit Agarwal , Vinod Koul , linux-kernel@vger.kernel.org, Richard Acayan , Melody Olvera , Krzysztof Kozlowski , linux-arm-msm@vger.kernel.org, Linus Walleij , Bjorn Andersson , Rob Herring , Martin Botka , Bartosz Golaszewski , krishna Lanka , Stephan Gerhold , Andy Gross , Conor Dooley Subject: Re: [PATCH 01/10] dt-bindings: pinctrl: qcom: create common LPASS LPI schema Message-ID: <170249281039.1698604.14736933847927766425.robh@kernel.org> References: <20231208215534.195854-1-krzysztof.kozlowski@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20231208215534.195854-1-krzysztof.kozlowski@linaro.org> X-Spam-Status: No, score=-1.0 required=5.0 tests=MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on howler.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (howler.vger.email [0.0.0.0]); Wed, 13 Dec 2023 10:40:30 -0800 (PST) On Fri, 08 Dec 2023 22:55:25 +0100, Krzysztof Kozlowski wrote: > Just like regular TLMM pin controllers in Qualcomm SoCs, the Low Power > Audio SubSystem (LPASS) Low Power Island (LPI) TLMM blocks share a lot > of properties, so common part can be moved to separate schema to reduce > code duplication and make reviewing easier. > > Except the move of common part, this introduces effective changes: > 1. To all LPASS LPI bindings: Reference pinmux-node.yaml in each pin > muxing and configuration node, to bring definition of "function" and > "pins" properties. > > 2. qcom,sc7280-lpass-lpi-pinctrl: Reference pinctrl.yaml in top leve. > > Signed-off-by: Krzysztof Kozlowski > --- > .../pinctrl/qcom,lpass-lpi-common.yaml | 75 +++++++++++++++++++ > .../qcom,sc7280-lpass-lpi-pinctrl.yaml | 49 ++---------- > .../qcom,sc8280xp-lpass-lpi-pinctrl.yaml | 49 +----------- > .../qcom,sm6115-lpass-lpi-pinctrl.yaml | 48 +----------- > .../qcom,sm8250-lpass-lpi-pinctrl.yaml | 49 +----------- > .../qcom,sm8350-lpass-lpi-pinctrl.yaml | 49 +----------- > .../qcom,sm8450-lpass-lpi-pinctrl.yaml | 49 +----------- > .../qcom,sm8550-lpass-lpi-pinctrl.yaml | 49 +----------- > .../qcom,sm8650-lpass-lpi-pinctrl.yaml | 49 +----------- > 9 files changed, 109 insertions(+), 357 deletions(-) > create mode 100644 Documentation/devicetree/bindings/pinctrl/qcom,lpass-lpi-common.yaml > Reviewed-by: Rob Herring