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Message-ID: <ab50cc75-2273-47a3-a0c3-fa2d8f1d2fd3@linux.intel.com>
Date:   Wed, 13 Dec 2023 14:54:36 -0500
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Subject: Re: [PATCH V2 0/5] Clean up perf mem
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To:     Athira Rajeev <atrajeev@linux.vnet.ibm.com>,
        Arnaldo Carvalho de Melo <acme@kernel.org>,
        Ravi Bangoria <ravi.bangoria@amd.com>
Cc:     Ian Rogers <irogers@google.com>,
        Peter Zijlstra <peterz@infradead.org>,
        Ingo Molnar <mingo@redhat.com>,
        Namhyung Kim <namhyung@kernel.org>,
        Jiri Olsa <jolsa@kernel.org>,
        Adrian Hunter <adrian.hunter@intel.com>,
        john.g.garry@oracle.com, Will Deacon <will@kernel.org>,
        James Clark <james.clark@arm.com>, mike.leach@linaro.org,
        Leo Yan <leo.yan@linaro.org>, yuhaixin.yhx@linux.alibaba.com,
        renyu.zj@linux.alibaba.com, Thomas Richter <tmricht@linux.ibm.com>,
        LKML <linux-kernel@vger.kernel.org>,
        linux-perf-users <linux-perf-users@vger.kernel.org>,
        linux-arm-kernel@lists.infradead.org
References: <20231207192338.400336-1-kan.liang@linux.intel.com>
 <ZXIrtcYkvpA8Uwj1@kernel.org>
 <DC029166-B60F-4E90-833D-F43818A3C54B@linux.vnet.ibm.com>
From:   "Liang, Kan" <kan.liang@linux.intel.com>
In-Reply-To: <DC029166-B60F-4E90-833D-F43818A3C54B@linux.vnet.ibm.com>
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On 2023-12-13 4:51 a.m., Athira Rajeev wrote:
> 
> 
>> On 08-Dec-2023, at 2:01 AM, Arnaldo Carvalho de Melo <acme@kernel.org> wrote:
>>
>> Em Thu, Dec 07, 2023 at 11:23:33AM -0800, kan.liang@linux.intel.com escreveu:
>>> From: Kan Liang <kan.liang@linux.intel.com>
>>>
>>> Changes since V1:
>>> - Fix strcmp of PMU name checking (Ravi)
>>> - Fix "/," typo (Ian)
>>> - Rename several functions with perf_pmu__mem_events prefix. (Ian)
>>> - Fold the header removal patch into the patch where the cleanups made.
>>>  (Arnaldo)
>>> - Add reviewed-by and tested-by from Ian and Ravi
>>
>> It would be good to have a Tested-by from people working in all the
>> architectures affectes, like we got from Ravi for AMD, can we get those?
>>
>> I'm applying it locally for test building, will push to
>> perf-tools-next/tmp.perf-tools-next for a while, so there is some time
>> to test.
>>
>> ARM64 (Leo?) and ppc, for PPC... humm Ravi did it, who could test it now?
> Hi Arnaldo, Ravi
> 
> Looking into this for testing on powerpc. Will update back.
>

Thanks Athira. I've sent out the latest V3. Please give it a try.

https://lore.kernel.org/lkml/20231213195154.1085945-1-kan.liang@linux.intel.com/

Thanks,
Kan

> Thanks
> Athira
>>
>> - Arnaldo
>>
>>> As discussed in the below thread, the patch set is to clean up perf mem.
>>> https://lore.kernel.org/lkml/afefab15-cffc-4345-9cf4-c6a4128d4d9c@linux.intel.com/
>>>
>>> Introduce generic functions perf_mem_events__ptr(),
>>> perf_mem_events__name() ,and is_mem_loads_aux_event() to replace the
>>> ARCH specific ones.
>>> Simplify the perf_mem_event__supported().
>>>
>>> Only keeps the ARCH-specific perf_mem_events array in the corresponding
>>> mem-events.c for each ARCH.
>>>
>>> There is no functional change.
>>>
>>> The patch set touches almost all the ARCHs, Intel, AMD, ARM, Power and
>>> etc. But I can only test it on two Intel platforms.
>>> Please give it try, if you have machines with other ARCHs.
>>>
>>> Here are the test results:
>>> Intel hybrid machine:
>>>
>>> $perf mem record -e list
>>> ldlat-loads  : available
>>> ldlat-stores : available
>>>
>>> $perf mem record -e ldlat-loads -v --ldlat 50
>>> calling: record -e cpu_atom/mem-loads,ldlat=50/P -e cpu_core/mem-loads,ldlat=50/P
>>>
>>> $perf mem record -v
>>> calling: record -e cpu_atom/mem-loads,ldlat=30/P -e cpu_atom/mem-stores/P -e cpu_core/mem-loads,ldlat=30/P -e cpu_core/mem-stores/P
>>>
>>> $perf mem record -t store -v
>>> calling: record -e cpu_atom/mem-stores/P -e cpu_core/mem-stores/P
>>>
>>>
>>> Intel SPR:
>>> $perf mem record -e list
>>> ldlat-loads  : available
>>> ldlat-stores : available
>>>
>>> $perf mem record -e ldlat-loads -v --ldlat 50
>>> calling: record -e {cpu/mem-loads-aux/,cpu/mem-loads,ldlat=50/}:P
>>>
>>> $perf mem record -v
>>> calling: record -e {cpu/mem-loads-aux/,cpu/mem-loads,ldlat=30/}:P -e cpu/mem-stores/P
>>>
>>> $perf mem record -t store -v
>>> calling: record -e cpu/mem-stores/P
>>>
>>> Kan Liang (5):
>>>  perf mem: Add mem_events into the supported perf_pmu
>>>  perf mem: Clean up perf_mem_events__ptr()
>>>  perf mem: Clean up perf_mem_events__name()
>>>  perf mem: Clean up perf_mem_event__supported()
>>>  perf mem: Clean up is_mem_loads_aux_event()
>>>
>>> tools/perf/arch/arm64/util/mem-events.c   |  36 +----
>>> tools/perf/arch/arm64/util/pmu.c          |   6 +
>>> tools/perf/arch/powerpc/util/mem-events.c |  13 +-
>>> tools/perf/arch/powerpc/util/mem-events.h |   7 +
>>> tools/perf/arch/powerpc/util/pmu.c        |  11 ++
>>> tools/perf/arch/s390/util/pmu.c           |   3 +
>>> tools/perf/arch/x86/util/mem-events.c     |  99 ++----------
>>> tools/perf/arch/x86/util/pmu.c            |  11 ++
>>> tools/perf/builtin-c2c.c                  |  28 +++-
>>> tools/perf/builtin-mem.c                  |  28 +++-
>>> tools/perf/util/mem-events.c              | 181 +++++++++++++---------
>>> tools/perf/util/mem-events.h              |  15 +-
>>> tools/perf/util/pmu.c                     |   4 +-
>>> tools/perf/util/pmu.h                     |   7 +
>>> 14 files changed, 233 insertions(+), 216 deletions(-)
>>> create mode 100644 tools/perf/arch/powerpc/util/mem-events.h
>>> create mode 100644 tools/perf/arch/powerpc/util/pmu.c
>>>
>>> -- 
>>> 2.35.1
>>>
>>
>> -- 
>>
>> - Arnaldo
> 
> 
>