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[2620:137:e000::3:2]) by mx.google.com with ESMTPS id d17-20020a056a00245100b006ce7b6f8c7esi10910680pfj.210.2023.12.13.23.31.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 13 Dec 2023 23:31:21 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:2 as permitted sender) client-ip=2620:137:e000::3:2; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:2 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by agentk.vger.email (Postfix) with ESMTP id 387F98082878; Wed, 13 Dec 2023 23:30:27 -0800 (PST) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.11 at agentk.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1443452AbjLNH36 (ORCPT + 99 others); Thu, 14 Dec 2023 02:29:58 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44530 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1443337AbjLNH3h (ORCPT ); Thu, 14 Dec 2023 02:29:37 -0500 Received: from fd01.gateway.ufhost.com (fd01.gateway.ufhost.com [61.152.239.71]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E570510E9; Wed, 13 Dec 2023 23:29:28 -0800 (PST) Received: from EXMBX165.cuchost.com (unknown [175.102.18.54]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client CN "EXMBX165", Issuer "EXMBX165" (not verified)) by fd01.gateway.ufhost.com (Postfix) with ESMTP id A0CEF810C; Thu, 14 Dec 2023 15:29:27 +0800 (CST) Received: from EXMBX171.cuchost.com (172.16.6.91) by EXMBX165.cuchost.com (172.16.6.75) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Thu, 14 Dec 2023 15:29:27 +0800 Received: from ubuntu.localdomain (113.72.145.168) by EXMBX171.cuchost.com (172.16.6.91) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Thu, 14 Dec 2023 15:29:23 +0800 From: Minda Chen To: Conor Dooley , =?UTF-8?q?Krzysztof=20Wilczy=C5=84ski?= , Rob Herring , Bjorn Helgaas , Lorenzo Pieralisi , "Daire McNamara" , Emil Renner Berthing , Krzysztof Kozlowski CC: , , , , Paul Walmsley , Palmer Dabbelt , Albert Ou , Philipp Zabel , Mason Huo , Leyfoon Tan , Kevin Xie , Minda Chen Subject: [PATCH v13 11/21] PCI: microchip: Add num_events field to struct plda_pcie_rp Date: Thu, 14 Dec 2023 15:28:29 +0800 Message-ID: <20231214072839.2367-12-minda.chen@starfivetech.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20231214072839.2367-1-minda.chen@starfivetech.com> References: <20231214072839.2367-1-minda.chen@starfivetech.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [113.72.145.168] X-ClientProxiedBy: EXCAS064.cuchost.com (172.16.6.24) To EXMBX171.cuchost.com (172.16.6.91) X-YovoleRuleAgent: yovoleflag X-Spam-Status: No, score=-0.8 required=5.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on agentk.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (agentk.vger.email [0.0.0.0]); Wed, 13 Dec 2023 23:30:27 -0800 (PST) The event num is different in other platform. For re-using interrupt process codes, replace macros with variable. Signed-off-by: Minda Chen Reviewed-by: Conor Dooley --- drivers/pci/controller/plda/pcie-microchip-host.c | 8 +++++--- drivers/pci/controller/plda/pcie-plda.h | 1 + 2 files changed, 6 insertions(+), 3 deletions(-) diff --git a/drivers/pci/controller/plda/pcie-microchip-host.c b/drivers/pci/controller/plda/pcie-microchip-host.c index 506e6eeadc76..7b3f4f74745d 100644 --- a/drivers/pci/controller/plda/pcie-microchip-host.c +++ b/drivers/pci/controller/plda/pcie-microchip-host.c @@ -654,7 +654,7 @@ static void plda_handle_event(struct irq_desc *desc) events = mc_get_events(port); - for_each_set_bit(bit, &events, NUM_EVENTS) + for_each_set_bit(bit, &events, port->num_events) generic_handle_domain_irq(port->event_domain, bit); chained_irq_exit(chip, desc); @@ -817,7 +817,8 @@ static int plda_pcie_init_irq_domains(struct plda_pcie_rp *port) return -EINVAL; } - port->event_domain = irq_domain_add_linear(pcie_intc_node, NUM_EVENTS, + port->event_domain = irq_domain_add_linear(pcie_intc_node, + port->num_events, &plda_event_domain_ops, port); if (!port->event_domain) { @@ -921,7 +922,7 @@ static int plda_init_interrupts(struct platform_device *pdev, struct plda_pcie_r if (irq < 0) return -ENODEV; - for (i = 0; i < NUM_EVENTS; i++) { + for (i = 0; i < port->num_events; i++) { event_irq = irq_create_mapping(port->event_domain, i); if (!event_irq) { dev_err(dev, "failed to map hwirq %d\n", i); @@ -1013,6 +1014,7 @@ static int mc_host_probe(struct platform_device *pdev) bridge_base_addr = port->axi_base_addr + MC_PCIE_BRIDGE_ADDR; plda->bridge_addr = bridge_base_addr; + plda->num_events = NUM_EVENTS; /* Allow enabling MSI by disabling MSI-X */ val = readl(bridge_base_addr + PCIE_PCI_IRQ_DW0); diff --git a/drivers/pci/controller/plda/pcie-plda.h b/drivers/pci/controller/plda/pcie-plda.h index 3deefd35fa5a..e3d35cef9894 100644 --- a/drivers/pci/controller/plda/pcie-plda.h +++ b/drivers/pci/controller/plda/pcie-plda.h @@ -118,6 +118,7 @@ struct plda_pcie_rp { raw_spinlock_t lock; struct plda_msi msi; void __iomem *bridge_addr; + int num_events; }; void plda_pcie_setup_window(void __iomem *bridge_base_addr, u32 index, -- 2.17.1