Received: by 2002:a05:7412:8d10:b0:f3:1519:9f41 with SMTP id bj16csp6027994rdb; Thu, 14 Dec 2023 06:36:33 -0800 (PST) X-Google-Smtp-Source: AGHT+IFf+x5f3xJibio65/L9AyEb+AANROFDsjvdrWYWzxyAAlgGjiAXC8JsSXPgD3mXaLEgWHKS X-Received: by 2002:a17:90b:1905:b0:286:997b:dce3 with SMTP id mp5-20020a17090b190500b00286997bdce3mr7274189pjb.77.1702564592885; Thu, 14 Dec 2023 06:36:32 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1702564592; cv=none; d=google.com; s=arc-20160816; b=j8SLYoMK4pYUshlOd0jtuncpz8Yi9ckRdITf8q2wl1JWYTIRCv/nWOopuxQpzShxPS WTEJBQ/52atqlXB80fLj52Hu7xJC9qFlci0ufAD5UsoonPWY83OwfZi3HlHeZdCH/jnb GphCZ5vMw8PSwxk0d/y84zeEu0OKdGjw811I04ZT4wNVuPk0If/v+evveOz5ExcI/+Gj 1AV6yJ7J7/Rc6GmACNSs01sJaBHCMAUFs/7o04xIiklMHNxhEFwmBcNlrNcfW6VI17dS psNyp21zQBFu5YW21sp6qTiGmn0oIp0tI7ShfZVPfERDgwPSRMoGW1kuwQzvMRTPPUzs 9uSQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:message-id:references :in-reply-to:subject:cc:to:from:date:mime-version:dkim-signature; bh=4+Xi2xa3RNrJtFpkg486v39REZonzsV1FXE9gDFjBxY=; fh=EOZ+eozBt88AqMCv+fyThV19hfV01Lgv2gqA51BhVbU=; b=eMylCZXandXNxZL+wsfL98hmH8jCaOxPxev+9euUixPrucla0T33sL45ZvdxxFmDAa fDtGyTH51F6JKdAZxWaFy2uLjoSStM2gc1Tuu1DgZR4QTxkrP1xRnx5GN4u+Itbwkd16 DAPPxh08NqJvUJI+UyqicdWwX5sgNwYcuu+TwFCLpT3xShFdA1MSQwkF0riyMBjfc8cL ZP/LOWR9Qk2U09jzDIgM51Jn+Zq1O4vFVR/XcIz6efv9SlDv1HpG8tj7aPPbHMZGNrma hD4Zh2SzA8tT/pyAxTbABfIKo3FQo20ccDvtBEtRrk6n0OF1yeq5lKJSIurT6OmgtFtf 68GA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@walle.cc header.s=mail2022082101 header.b=g3Lza4ep; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.35 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=walle.cc Return-Path: Received: from groat.vger.email (groat.vger.email. [23.128.96.35]) by mx.google.com with ESMTPS id i8-20020a17090a974800b00286e6980c12si11492612pjw.93.2023.12.14.06.36.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 14 Dec 2023 06:36:32 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.35 as permitted sender) client-ip=23.128.96.35; Authentication-Results: mx.google.com; dkim=pass header.i=@walle.cc header.s=mail2022082101 header.b=g3Lza4ep; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.35 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=walle.cc Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by groat.vger.email (Postfix) with ESMTP id 250F88076653; Thu, 14 Dec 2023 06:35:34 -0800 (PST) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.11 at groat.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1573506AbjLNOfR (ORCPT + 99 others); Thu, 14 Dec 2023 09:35:17 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58866 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1573505AbjLNOfP (ORCPT ); Thu, 14 Dec 2023 09:35:15 -0500 Received: from mail.3ffe.de (0001.3ffe.de [IPv6:2a01:4f8:c0c:9d57::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 78675115; Thu, 14 Dec 2023 06:35:20 -0800 (PST) Received: from 3ffe.de (0001.3ffe.de [IPv6:2a01:4f8:c0c:9d57::1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mail.3ffe.de (Postfix) with ESMTPSA id 711003AF; Thu, 14 Dec 2023 15:35:18 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=walle.cc; s=mail2022082101; t=1702564518; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=4+Xi2xa3RNrJtFpkg486v39REZonzsV1FXE9gDFjBxY=; b=g3Lza4epRiuQ2jTvpphPjZoq8XhgvlU0duoNfiNvaz+QSZo3DEjdaCOuI9dEzVsXPYvCmO Is77hlxOSz0X/ogZkX7fV3Wku80MP2Fb9ENujYzgDB/aFLmdYkpZ7AOvV7OrQvaQfinrCJ rxQK8Obe/A+poz8FWsFDpuJpOv1cqbsMZ0k9E1RN4OugyWI9az82iOxayHG/qw1P5nyIAf XEePHJTE+ZVA87rPf7iyA14xWrhdv+3WPv99sdwgwHTQZUM1Qjbgr9jMD6SfETRlhpeD/0 d6UEVSDNVHGshTwP3ayoSFWk5ehad4szdiCePvyHwldcxWYxfOyC9fJzhRTUHA== MIME-Version: 1.0 Date: Thu, 14 Dec 2023 15:35:18 +0100 From: Michael Walle To: Andy Shevchenko , =?UTF-8?Q?TY=5FChang=5B=E5=BC=B5?= =?UTF-8?Q?=E5=AD=90=E9=80=B8=5D?= Cc: Linus Walleij , Bartosz Golaszewski , Rob Herring , Krzysztof Kozlowski , Conor Dooley , linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v3 2/2] Add GPIO support for Realtek DHC(Digital Home Center) RTD SoCs. In-Reply-To: References: <20231207100723.15015-1-tychang@realtek.com> <20231207100723.15015-3-tychang@realtek.com> <989146448858478b975c66899b8f3fed@realtek.com> <23574204547646779d02f0109c20b3ff@realtek.com> Message-ID: <0f0b3b65a838aea6797ae78c47d6af49@walle.cc> X-Sender: michael@walle.cc Content-Type: text/plain; charset=US-ASCII; format=flowed Content-Transfer-Encoding: 7bit X-Spam-Status: No, score=-0.9 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on groat.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (groat.vger.email [0.0.0.0]); Thu, 14 Dec 2023 06:35:34 -0800 (PST) Hi, >> >> >> This driver enables configuration of GPIO direction, GPIO values, >> >> >> GPIO debounce settings and handles GPIO interrupts. >> >> > >> >> >Why gpio-regmap can't be used? >> >> >> >> I will try to use gpio-remap in the next version. >> > >> >If it appears that it makes code uglier / complicated, please add the note >> >somewhere to answer the above question. >> >> I've traced the gpio-regmap.c file. It appears that for the driver to >> register >> gpio_irq_chip, it must create the irq_domain and add it into >> gpio_regmap_config. >> Additionally, the driver needs to register the irq handler by itself. >> However, this process can be managed by the gpiolib if the driver >> fills in the struct >> gpio_irq_chip inside struct gpio_chip before invoking >> gpiochip_add_data. > > Hmm... I thought this is solvable issue. > Michael, is there a limitation in GPIO regmap that this driver can't be > converted? gpio-regmap is designed that regmap-irq (drivers/base/regmap/irq.c) can be used. So, if regmap-irq fit this driver, then it can be used together with gpio-regmap. From a quick glance at the patch, it looks like the gpio portion might fit gpio-regmap. >> Moreover, apart from managing the registers for gpio direction and >> value, there >> are several other registers that require access(interrupt enable, >> debounce...). >> The GPIO IRQ status registers are located at different base addresses >> and are >> not contiguous. It may need to create an additional regmap and assign >> the access >> table to this regmap. > > AFAIK this is not a problem as you can provide your own xlate function > that > will take care about register mapping. Just for the gpio part. IIRC regmap has it own translation (regmap fields). >> With the above consideration, I tend to keep using the existing >> method. > > I would like to hear from Michael if it's indeed a big obstacle. So, regarding the irq portion, again, it must fit the regmap-irq. For the additional requirement to set the debounce, you can add a .set_config to gpio_regmap_config and supply your own set_config callback. See also [1]. -michael [1] https://lore.kernel.org/linux-gpio/d4a6a640c373b6d939e147691efa596c@walle.cc/