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a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1702568387; x=1703173187; h=content-transfer-encoding:cc:to:subject:message-id:date:from :in-reply-to:references:mime-version:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=VdjSPhIyB1xzNvePwzN4Lv4667HwZ9Mo32XFQbt5RU0=; b=k5ZwDXFbW+clv0TD3PIKYXJv5Q4Zetjd+LzP7VJtWO6tZLImDzytsS0yr9kbmq9rWv pgTTLa+ocT0LS4lndkXF9+IOcdDIF5EEahQ1nH5KXKXwFRFXIge3rRO5jKGE/VY+iY4L FY3s85Gct/AQenNwcF+JMBnan69CBiN0wr1E/7H/AqIdeGqWB7kG/USKujzYIyl5IdUc 131q7jwKFqqJxNEkHjCtVKVbd5ZJWLzOfrY0GMJeLIm/O4TpM+0X+DJ7gbWtJfg0hn9w xTOkPuFEdMTS7gj8UOkyHRwuDu31dhXJSnvZTpL2h5+nOUsyuNIrAJmiMoPnnva0ypyS vpyA== X-Gm-Message-State: AOJu0Yz1n3FwN+h3w/+zqe2dsPq8dTWGfZA85yWJSJeIOBR1DzahzJQ7 xngdBAzP4mMsWubDyyn5NotYNo+qelZzmAwD/ALYBQ== X-Received: by 2002:a17:90a:e50:b0:286:964d:c with SMTP id p16-20020a17090a0e5000b00286964d000cmr7480168pja.86.1702568387270; Thu, 14 Dec 2023 07:39:47 -0800 (PST) MIME-Version: 1.0 References: <20231214105243.3707730-1-tudor.ambarus@linaro.org> <20231214105243.3707730-9-tudor.ambarus@linaro.org> In-Reply-To: <20231214105243.3707730-9-tudor.ambarus@linaro.org> From: Sam Protsenko Date: Thu, 14 Dec 2023 09:39:35 -0600 Message-ID: Subject: Re: [PATCH 08/13] arm64: dts: exynos: gs101: enable cmu-peric0 clock controller To: Tudor Ambarus Cc: peter.griffin@linaro.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, mturquette@baylibre.com, sboyd@kernel.org, conor+dt@kernel.org, andi.shyti@kernel.org, alim.akhtar@samsung.com, gregkh@linuxfoundation.org, jirislaby@kernel.org, catalin.marinas@arm.com, will@kernel.org, s.nawrocki@samsung.com, tomasz.figa@gmail.com, cw00.choi@samsung.com, arnd@arndb.de, andre.draszik@linaro.org, saravanak@google.com, willmcvicker@google.com, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-i2c@vger.kernel.org, linux-serial@vger.kernel.org Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Spam-Status: No, score=-0.9 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on howler.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (howler.vger.email [0.0.0.0]); Thu, 14 Dec 2023 07:39:54 -0800 (PST) On Thu, Dec 14, 2023 at 4:52=E2=80=AFAM Tudor Ambarus wrote: > > Enable the cmu-peric0 clock controller. It feeds USI and I3c. > > Signed-off-by: Tudor Ambarus > --- > arch/arm64/boot/dts/exynos/google/gs101.dtsi | 12 ++++++++++++ > 1 file changed, 12 insertions(+) > > diff --git a/arch/arm64/boot/dts/exynos/google/gs101.dtsi b/arch/arm64/bo= ot/dts/exynos/google/gs101.dtsi > index 9747cb3fa03a..d0b0ad70c6ba 100644 > --- a/arch/arm64/boot/dts/exynos/google/gs101.dtsi > +++ b/arch/arm64/boot/dts/exynos/google/gs101.dtsi > @@ -339,6 +339,18 @@ ppi_cluster2: interrupt-partition-2 { > }; > }; > > + cmu_peric0: clock-controller@10800000 { > + compatible =3D "google,gs101-cmu-peric0"; > + reg =3D <0x10800000 0x4000>; > + #clock-cells =3D <1>; > + clocks =3D <&ext_24_5m>, > + <&cmu_top CLK_DOUT_CMU_PERIC0_BUS>, > + <&cmu_top CLK_DOUT_CMU_PERIC0_IP>; > + clock-names =3D "oscclk", > + "dout_cmu_peric0_bus", I'd pull this line to the above line. Other than that: Reviewed-by: Sam Protsenko > + "dout_cmu_peric0_ip"; > + }; > + > sysreg_peric0: syscon@10820000 { > compatible =3D "google,gs101-peric0-sysreg", "sys= con"; > reg =3D <0x10820000 0x10000>; > -- > 2.43.0.472.g3155946c3a-goog >