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Thu, 14 Dec 2023 08:01:21 -0800 (PST) Message-ID: Date: Thu, 14 Dec 2023 16:01:18 +0000 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 07/13] clk: samsung: gs101: mark PERIC0 IP TOP gate clock as critical Content-Language: en-US To: Sam Protsenko Cc: peter.griffin@linaro.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, mturquette@baylibre.com, sboyd@kernel.org, conor+dt@kernel.org, andi.shyti@kernel.org, alim.akhtar@samsung.com, gregkh@linuxfoundation.org, jirislaby@kernel.org, catalin.marinas@arm.com, will@kernel.org, s.nawrocki@samsung.com, tomasz.figa@gmail.com, cw00.choi@samsung.com, arnd@arndb.de, andre.draszik@linaro.org, saravanak@google.com, willmcvicker@google.com, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-i2c@vger.kernel.org, linux-serial@vger.kernel.org References: <20231214105243.3707730-1-tudor.ambarus@linaro.org> <20231214105243.3707730-8-tudor.ambarus@linaro.org> From: Tudor Ambarus In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-0.9 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on fry.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (fry.vger.email [0.0.0.0]); Thu, 14 Dec 2023 08:01:42 -0800 (PST) On 12/14/23 15:37, Sam Protsenko wrote: > On Thu, Dec 14, 2023 at 4:52 AM Tudor Ambarus wrote: >> >> Testing USI8 I2C with an eeprom revealed that when the USI8 leaf clock >> is disabled it leads to the CMU_TOP PERIC0 IP gate clock disablement, >> which then makes the system hang. To prevent this, mark >> CLK_GOUT_CMU_PERIC0_IP as critical. Other clocks will be marked >> accordingly when tested. >> >> Signed-off-by: Tudor Ambarus >> --- >> drivers/clk/samsung/clk-gs101.c | 2 +- >> 1 file changed, 1 insertion(+), 1 deletion(-) >> >> diff --git a/drivers/clk/samsung/clk-gs101.c b/drivers/clk/samsung/clk-gs101.c >> index 3d194520b05e..08d80fca9cd6 100644 >> --- a/drivers/clk/samsung/clk-gs101.c >> +++ b/drivers/clk/samsung/clk-gs101.c >> @@ -1402,7 +1402,7 @@ static const struct samsung_gate_clock cmu_top_gate_clks[] __initconst = { >> "mout_cmu_peric0_bus", CLK_CON_GAT_GATE_CLKCMU_PERIC0_BUS, >> 21, 0, 0), >> GATE(CLK_GOUT_CMU_PERIC0_IP, "gout_cmu_peric0_ip", "mout_cmu_peric0_ip", >> - CLK_CON_GAT_GATE_CLKCMU_PERIC0_IP, 21, 0, 0), >> + CLK_CON_GAT_GATE_CLKCMU_PERIC0_IP, 21, CLK_IS_CRITICAL, 0), > > This clock doesn't seem like a leaf clock. It's also not a bus clock. > Leaving it always running makes the whole PERIC0 CMU clocked, which > usually should be avoided. Is it possible that the system freezes > because some other clock (which depends on peric0_ip) gets disabled as > a consequence of disabling peric0_ip? Maybe it's some leaf clock which > is not implemented yet in the clock driver? Just looks weird to me > that the system hangs because of CMU IP clock disablement. It's > usually something much more specific. The system hang happened when I tested USI8 in I2C configuration with an eeprom. After the eeprom is read the leaf gate clock that gets disabled is the one on PERIC0 (CLK_GOUT_PERIC0_CLK_PERIC0_USI8_USI_CLK). I assume this leads to the CMU_TOP gate (CLK_CON_GAT_GATE_CLKCMU_PERIC0_IP) disablement which makes the system hang. Either marking the CMU_TOP gate clock as critical (as I did in this patch) or marking the leaf PERIC0 gate clock as critical, gets rid of the system hang. Did I choose wrong? Thanks, ta > >> GATE(CLK_GOUT_CMU_PERIC1_BUS, "gout_cmu_peric1_bus", >> "mout_cmu_peric1_bus", CLK_CON_GAT_GATE_CLKCMU_PERIC1_BUS, >> 21, 0, 0), >> -- >> 2.43.0.472.g3155946c3a-goog >>