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[2620:137:e000::3:5]) by mx.google.com with ESMTPS id u6-20020a63df06000000b005c6045987a1si11343272pgg.7.2023.12.14.08.21.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 14 Dec 2023 08:21:22 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:5 as permitted sender) client-ip=2620:137:e000::3:5; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:5 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=sntech.de Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by groat.vger.email (Postfix) with ESMTP id 4377E8266271; Thu, 14 Dec 2023 08:20:55 -0800 (PST) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.11 at groat.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229803AbjLNQUZ (ORCPT + 99 others); Thu, 14 Dec 2023 11:20:25 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37776 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229510AbjLNQUX (ORCPT ); Thu, 14 Dec 2023 11:20:23 -0500 Received: from gloria.sntech.de (gloria.sntech.de [185.11.138.130]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 507B710A; Thu, 14 Dec 2023 08:20:28 -0800 (PST) Received: from i53875b61.versanet.de ([83.135.91.97] helo=diego.localnet) by gloria.sntech.de with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1rDoRR-0005iB-OR; Thu, 14 Dec 2023 17:20:05 +0100 From: Heiko =?ISO-8859-1?Q?St=FCbner?= To: Alex Bee , Sandy Huang , Andy Yan , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Krzysztof Kozlowski Cc: David Airlie , Daniel Vetter , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH 01/11] dt-bindings: display: rockchip,inno-hdmi: Document RK3128 compatible Date: Thu, 14 Dec 2023 17:20:04 +0100 Message-ID: <2221612.3VsfAaAtOV@diego> In-Reply-To: References: <20231213195125.212923-1-knaerzche@gmail.com> <288857ab-bebd-4f80-9cdc-9b04fa6c7386@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="us-ascii" X-Spam-Status: No, score=-0.8 required=5.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on groat.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (groat.vger.email [0.0.0.0]); Thu, 14 Dec 2023 08:20:55 -0800 (PST) Am Donnerstag, 14. Dezember 2023, 17:07:27 CET schrieb Krzysztof Kozlowski: > On 14/12/2023 16:22, Alex Bee wrote: > > > > Am 14.12.23 um 08:53 schrieb Krzysztof Kozlowski: > >> On 13/12/2023 20:51, Alex Bee wrote: > >>> Document the compatible for RK3128's HDMI controller block. > >>> The integration for this SoC is somewhat different here: It needs the PHY's > >> Please wrap commit message according to Linux coding style / submission > >> process (neither too early nor over the limit): > >> https://elixir.bootlin.com/linux/v6.4-rc1/source/Documentation/process/submitting-patches.rst#L597 > > OK. Not sure why checkpatch --strict didn't tell me that I'm over the > > limit here. > >> > >>> reference clock rate to calculate the ddc bus frequency correctly. This > >>> clock is part of a power-domain (PD_VIO), so this gets added as an optional > >>> property too. > >> If clock is part of power domain, then the power domain must be in the > >> clock controller, not here. So either you put power domain in wrong > >> place or you used incorrect reason for a change. > > Rockchip defines it's powerdomains per clock and I was little to much > > in that world when writing this. Actually the controller itself is part > > of the powerdomain. Will rephrase. > > Does it mean you have like 200 different power domains in one SoC? Then > how are they different than clock if there is one-to-one mapping? It's more like the other way around. Controllers and their clocks belong to specific power-domains. So there are of course more clocks than domains.