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[209.85.218.47]) by smtp.gmail.com with ESMTPSA id th19-20020a1709078e1300b00a1bda8db043sm9721455ejc.120.2023.12.14.12.50.47 for (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 14 Dec 2023 12:50:47 -0800 (PST) Received: by mail-ej1-f47.google.com with SMTP id a640c23a62f3a-a1ca24776c3so212637866b.0 for ; Thu, 14 Dec 2023 12:50:47 -0800 (PST) X-Received: by 2002:a17:906:608e:b0:a04:e1e7:d14c with SMTP id t14-20020a170906608e00b00a04e1e7d14cmr11442076ejj.32.1702587046729; Thu, 14 Dec 2023 12:50:46 -0800 (PST) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 References: <20231213211126.24f8c1dd@gandalf.local.home> <20231213214632.15047c40@gandalf.local.home> <20231214115614.2cf5a40e@gandalf.local.home> <20231214153636.655e18ce@gandalf.local.home> In-Reply-To: <20231214153636.655e18ce@gandalf.local.home> From: Linus Torvalds Date: Thu, 14 Dec 2023 12:50:29 -0800 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH] ring-buffer: Remove 32bit timestamp logic To: Steven Rostedt Cc: "linux-arch@vger.kernel.org" , LKML , Linux Trace Kernel , Masami Hiramatsu , Mark Rutland , Mathieu Desnoyers Content-Type: text/plain; charset="UTF-8" On Thu, 14 Dec 2023 at 12:35, Steven Rostedt wrote: > > On Thu, 14 Dec 2023 11:44:55 -0800 > Linus Torvalds wrote: > > > On Thu, 14 Dec 2023 at 08:55, Steven Rostedt wrote: > > > > > > And yes, this does get called in NMI context. > > > > Not on an i486-class machine they won't. You don't have a local apic > > on those, and they won't have any NMI sources under our control (ie > > NMI does exist, but we're talking purely legacy NMI for "motherboard > > problems" like RAM parity errors etc) > > Ah, so we should not worry about being in NMI context without a 64bit cmpxchg? .. on x86. Elsewhere, who knows? It is *probably* true in most situations. '32-bit' => 'legacy' => 'less likely to have fancy profiling / irq setups'. But I really don't know. > > So no. You need to forget about the whole "do a 64-bit cmpxchg on > > 32-bit architectures" as being some kind of solution in the short > > term. > > But do all archs have an implementation of cmpxchg64, even if it requires > disabling interrupts? If not, then I definitely cannot remove this code. We have a generic header file, so anybody who uses that would get the fallback version, ie arch_cmpxchg64 -> generic_cmpxchg64_local -> __generic_cmpxchg64_local which does that irq disabling thing. But no, not everybody is guaranteed to use that fallback. From a quick look, ARC, hexagon and CSky don't do this, for example. And then I got bored and stopped looking. My guess is that *most* 32-bit architectures do not have a 64-bit cmpxchg - not even the irq-safe one. For the UP case you can do your own, of course. Linus