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From: "Tian, Kevin" <kevin.tian@intel.com>
To: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"iommu@lists.linux.dev" <iommu@lists.linux.dev>, "joro@8bytes.org"
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CC: "Liu, Yi L" <yi.l.liu@intel.com>, "nicolinc@nvidia.com"
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Subject: RE: [RFC PATCH 2/6] iommu/amd: Add support for hw_info for iommu
 capability query
Thread-Topic: [RFC PATCH 2/6] iommu/amd: Add support for hw_info for iommu
 capability query
Thread-Index: AQHaLRSbpYfs7aIYn063qqpxjr0tnLCp9wSw
Date: Fri, 15 Dec 2023 07:32:08 +0000
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References: <20231212160139.174229-1-suravee.suthikulpanit@amd.com>
 <20231212160139.174229-3-suravee.suthikulpanit@amd.com>
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> From: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
> Sent: Wednesday, December 13, 2023 12:02 AM
>=20
> +void amd_iommu_build_efr(u64 *efr, u64 *efr2)
> +{
> +	if (efr) {
> +		*efr =3D (FEATURE_GT | FEATURE_GIOSUP | FEATURE_PPR);
> +
> +		/* 5-level v2 page table support */
> +		*efr |=3D ((FEATURE_GATS_5LEVEL << FEATURE_GATS_SHIFT) &
> +			 FEATURE_GATS_MASK);
> +
> +		/* 3-level GCR3 table support */
> +		*efr |=3D ((FEATURE_GLX_3LEVEL << FEATURE_GLX_SHIFT) &
> +			 FEATURE_GLX_MASK);
> +
> +		/* 16-bit PASMAX support */
> +		*efr |=3D ((FEATURE_PASMAX_16 << FEATURE_PASMAX_SHIFT)
> &
> +			 FEATURE_PASMAX_MASK);
> +	}
> +
> +	if (efr2)
> +		*efr2 =3D 0;
> +}

Don't this need to check the support in hw?