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Fri, 15 Dec 2023 10:41:10 GMT Received: from [10.253.13.71] (10.80.80.8) by nalasex01c.na.qualcomm.com (10.47.97.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.40; Fri, 15 Dec 2023 02:41:01 -0800 Message-ID: <7bae46fd-63fd-4b86-9a56-73052cf0ea95@quicinc.com> Date: Fri, 15 Dec 2023 18:40:54 +0800 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 5/5] dt-bindings: net: ipq4019-mdio: Document ipq5332 platform Content-Language: en-US To: Krzysztof Kozlowski , Conor Dooley CC: , , , , , , , , , , , , , , , , , , References: <20231212115151.20016-1-quic_luoj@quicinc.com> <20231212115151.20016-6-quic_luoj@quicinc.com> <20231212-caution-improvise-ed3cc6a1d305@spud> <11ffc985-3f2b-46b9-ae0b-911f7abe98d1@quicinc.com> <20231214-outshine-shush-8a11c68607cd@spud> <26c8b0b1-5ea9-45cc-adf3-0d0b03a1284d@linaro.org> <4b9c56b8-3b29-4861-a3d5-2da26fbc14b4@quicinc.com> <2e77e3b1-00b6-46b9-bfed-7cae3ffa15e9@linaro.org> From: Jie Luo In-Reply-To: <2e77e3b1-00b6-46b9-bfed-7cae3ffa15e9@linaro.org> Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01c.na.qualcomm.com (10.47.97.35) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: qiH7OeuuE9BcDQDb3Yvd84bvIAbzZ7-m X-Proofpoint-ORIG-GUID: qiH7OeuuE9BcDQDb3Yvd84bvIAbzZ7-m X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.997,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-12-09_02,2023-12-07_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 impostorscore=0 bulkscore=0 priorityscore=1501 suspectscore=0 spamscore=0 mlxscore=0 lowpriorityscore=0 malwarescore=0 phishscore=0 mlxlogscore=938 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2311290000 definitions=main-2312150070 On 12/15/2023 6:37 PM, Krzysztof Kozlowski wrote: > On 15/12/2023 11:33, Jie Luo wrote: >>>>>>>>>> + cmn-reference-clock: >>>>>>>>>> + oneOf: >>>>>>>>>> + - items: >>>>>>>>>> + - enum: >>>>>>>>>> + - 0 # CMN PLL reference internal 48MHZ >>>>>>>>>> + - 1 # CMN PLL reference external 25MHZ >>>>>>>>>> + - 2 # CMN PLL reference external 31250KHZ >>>>>>>>>> + - 3 # CMN PLL reference external 40MHZ >>>>>>>>>> + - 4 # CMN PLL reference external 48MHZ >>>>>>>>>> + - 5 # CMN PLL reference external 50MHZ >>>>>>>>>> + - 6 # CMN PLL reference internal 96MHZ >>>>>>>>> >>>>>>>>> Why is this not represented by an element of the clocks property? >>>>>>>> >>>>>>>> This property is for the reference clock source selection of CMN PLL, >>>>>>>> CMN PLL generates the different clock rates for the different Ethernet >>>>>>>> blocks, this CMN PLL configuration is not located in the GCC, so the >>>>>>>> clock framework can't be used, which is the general hardware register >>>>>>>> instead of RCG register for GCC. >>>>>>> >>>>>>> I don't see how the clock being provided by the "GCC" (whatever that is) >>>>>>> or by some other clock controller or fixed clock makes a difference. >>>>>>> Why can't the other clock provider be represented in the devicetree? >>>>>>> >>>>>> >>>>>> cmn-reference-clock is for selecting the reference clock source for the >>>>>> whole Ethernet block, which is just the standalone configure register. >>>>> >>>>> Sure, you are aware though that all clocks are just configure registers? >>>>> >>>>> Which clocks are these mentioned in the property? From where do they come? >>>>> >>>>> Anyway, property is in existing form is not correct - this is not a >>>>> generic property. >>>>> >>>> >>>> This property cmn-reference-clock is just the hardware register >>>> configuration, since the different IPQ platform needs to select >>>> the different reference clock source for the CMN PLL block that >>>> provides the various clock outputs to the all kinds of Ethernet >>>> devices, which is not from GCC provider. >>> >>> AGAIN: where do the clocks come from? Which device generates them? >> >> Oh, OK, the reference clock is from wifi that provides 48MHZ to >> Ethernet block. > > Then WiFi should be providing you the clock and this device should be > clock consumer, right? Yes, wifi provides 48MHz clock to CMM PLL block, there is no GCC for this 48MHZ clock output, it is the hardware PIN connection. > > > > Best regards, > Krzysztof >