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Date: Fri, 15 Dec 2023 13:12:25 +0100
From: Andrew Lunn <andrew@lunn.ch>
To: Luo Jie <quic_luoj@quicinc.com>
Cc: davem@davemloft.net, edumazet@google.com, kuba@kernel.org,
	pabeni@redhat.com, robh+dt@kernel.org,
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Subject: Re: [PATCH v8 14/14] dt-bindings: net: ar803x: add qca8084 PHY
 properties
Message-ID: <60b9081c-76fa-4122-b7ae-5c3dcf7229f9@lunn.ch>
References: <20231215074005.26976-1-quic_luoj@quicinc.com>
 <20231215074005.26976-15-quic_luoj@quicinc.com>
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> +  clocks:
> +    items:
> +      - description: APB bridge clock
> +      - description: AHB clock
> +      - description: Security control clock
> +      - description: TLMM clock
> +      - description: TLMM AHB clock
> +      - description: CNOC AHB clock
> +      - description: MDIO AHB clock
> +      - description: MDIO master AHB clock
> +      - description: PCS0 system clock
> +      - description: PCS1 system clock
> +      - description: EPHY0 system clock
> +      - description: EPHY1 system clock
> +      - description: EPHY2 system clock
> +      - description: EPHY3 system clock

What exactly are you describing here? A PHY, or a PHY package?

The ethernet-phy.yaml describes a PHY. So does each of your 4 PHYs
have 14 clocks? The PHY package as a whole has 14*4 clocks?

This seems unlikely. You have some clocks used by the package as a
whole, and you have some clocks used by one specific PHY within the
package. So you need a hierarchical description of the hardware in DT,
to match the actual hierarchical of the hardware.

This is exactly what Christian has been working on, and you have
persistently ignored what he is doing. You need to work with him.
Nothing is going to be merged until you and Christian have one
consistent design for the two PHYs you are working on.


    Andrew

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pw-bot: cr