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Message-ID: <7416d373-15c0-44d6-9008-d5d093ba8752@ixit.cz>
Date: Sat, 16 Dec 2023 00:32:11 +0100
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Subject: Re: [PATCH v3] dt-bindings: iommu: Convert msm,iommu-v0 to yaml
To: Rob Herring <robh@kernel.org>
Cc: Joerg Roedel <joro@8bytes.org>, Will Deacon <will@kernel.org>,
 Andy Gross <agross@kernel.org>, Bjorn Andersson
 <bjorn.andersson@linaro.org>, ~okias/devicetree@lists.sr.ht,
 iommu@lists.linux-foundation.org, devicetree@vger.kernel.org,
 linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org
References: <20220108184143.69479-1-david@ixit.cz>
 <Yd44NhcBWh1c4vuV@robh.at.kernel.org>
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From: David Heidelberg <david@ixit.cz>
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In-Reply-To: <Yd44NhcBWh1c4vuV@robh.at.kernel.org>
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Thank you, sent V4.
David

On 12/01/2022 03:08, Rob Herring wrote:
> On Sat, Jan 08, 2022 at 07:41:42PM +0100, David Heidelberg wrote:
>> Convert Qualcomm IOMMU v0 implementation to yaml format.
>>
>> Signed-off-by: David Heidelberg <david@ixit.cz>
>> ---
>> v2:
>>   - fix wrong path in binding $id
>>   - comment qcom,mdp4 node example (we don't want to validate it yet)
>>
>> v3:
>>   - I kept the name as -v0, since we have other binding -v1 and it look
>>     good, I can change thou in v4 if requested.
> The preference is to use compatible strings for filenames. There's
> little reason not to do that here.
>
>>   - dropped non-existent smmu_clk part (and adjusted example, which was
>>     using it)
>>   - dropped iommu description
>>   - moved iommu-cells description to the property #iommu-cells
>> Signed-off-by: David Heidelberg <david@ixit.cz>
>> ---
>>   .../bindings/iommu/msm,iommu-v0.txt           | 64 -------------
>>   .../bindings/iommu/qcom,iommu-v0.yaml         | 91 +++++++++++++++++++
>>   2 files changed, 91 insertions(+), 64 deletions(-)
>>   delete mode 100644 Documentation/devicetree/bindings/iommu/msm,iommu-v0.txt
>>   create mode 100644 Documentation/devicetree/bindings/iommu/qcom,iommu-v0.yaml
>>
>> diff --git a/Documentation/devicetree/bindings/iommu/msm,iommu-v0.txt b/Documentation/devicetree/bindings/iommu/msm,iommu-v0.txt
>> deleted file mode 100644
>> index 20236385f26e..000000000000
>> --- a/Documentation/devicetree/bindings/iommu/msm,iommu-v0.txt
>> +++ /dev/null
>> @@ -1,64 +0,0 @@
>> -* QCOM IOMMU
>> -
>> -The MSM IOMMU is an implementation compatible with the ARM VMSA short
>> -descriptor page tables. It provides address translation for bus masters outside
>> -of the CPU, each connected to the IOMMU through a port called micro-TLB.
>> -
>> -Required Properties:
>> -
>> -  - compatible: Must contain "qcom,apq8064-iommu".
>> -  - reg: Base address and size of the IOMMU registers.
>> -  - interrupts: Specifiers for the MMU fault interrupts. For instances that
>> -    support secure mode two interrupts must be specified, for non-secure and
>> -    secure mode, in that order. For instances that don't support secure mode a
>> -    single interrupt must be specified.
>> -  - #iommu-cells: The number of cells needed to specify the stream id. This
>> -		  is always 1.
>> -  - qcom,ncb:	  The total number of context banks in the IOMMU.
>> -  - clocks	: List of clocks to be used during SMMU register access. See
>> -		  Documentation/devicetree/bindings/clock/clock-bindings.txt
>> -		  for information about the format. For each clock specified
>> -		  here, there must be a corresponding entry in clock-names
>> -		  (see below).
>> -
>> -  - clock-names	: List of clock names corresponding to the clocks specified in
>> -		  the "clocks" property (above).
>> -		  Should be "smmu_pclk" for specifying the interface clock
>> -		  required for iommu's register accesses.
>> -		  Should be "smmu_clk" for specifying the functional clock
>> -		  required by iommu for bus accesses.
>> -
>> -Each bus master connected to an IOMMU must reference the IOMMU in its device
>> -node with the following property:
>> -
>> -  - iommus: A reference to the IOMMU in multiple cells. The first cell is a
>> -	    phandle to the IOMMU and the second cell is the stream id.
>> -	    A single master device can be connected to more than one iommu
>> -	    and multiple contexts in each of the iommu. So multiple entries
>> -	    are required to list all the iommus and the stream ids that the
>> -	    master is connected to.
>> -
>> -Example: mdp iommu and its bus master
>> -
>> -                mdp_port0: iommu@7500000 {
>> -			compatible = "qcom,apq8064-iommu";
>> -			#iommu-cells = <1>;
>> -			clock-names =
>> -			    "smmu_pclk",
>> -			    "smmu_clk";
>> -			clocks =
>> -			    <&mmcc SMMU_AHB_CLK>,
>> -			    <&mmcc MDP_AXI_CLK>;
>> -			reg = <0x07500000 0x100000>;
>> -			interrupts =
>> -			    <GIC_SPI 63 0>,
>> -			    <GIC_SPI 64 0>;
>> -			qcom,ncb = <2>;
>> -		};
>> -
>> -		mdp: qcom,mdp@5100000 {
>> -			compatible = "qcom,mdp";
>> -			...
>> -			iommus = <&mdp_port0 0
>> -				  &mdp_port0 2>;
>> -		};
>> diff --git a/Documentation/devicetree/bindings/iommu/qcom,iommu-v0.yaml b/Documentation/devicetree/bindings/iommu/qcom,iommu-v0.yaml
>> new file mode 100644
>> index 000000000000..a506e8ad8902
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/iommu/qcom,iommu-v0.yaml
>> @@ -0,0 +1,91 @@
>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
>> +%YAML 1.2
>> +---
>> +
>> +$id: "http://devicetree.org/schemas/iommu/qcom,iommu-v0.yaml#"
>> +$schema: "http://devicetree.org/meta-schemas/core.yaml#"
>> +
>> +title: Qualcomm IOMMU for APQ8064
>> +
>> +maintainers:
>> +  - Will Deacon <will@kernel.org>
>> +
>> +description: >
>> +  The MSM IOMMU is an implementation compatible with the ARM VMSA short
>> +  descriptor page tables. It provides address translation for bus masters
>> +  outside of the CPU, each connected to the IOMMU through a port called micro-TLB.
>> +
>> +properties:
>> +  compatible:
>> +    const: qcom,apq8064-iommu
>> +
>> +  clocks:
>> +    items:
>> +      - description: interface clock for register accesses
>> +      - description: functional clock for bus accesses
>> +
>> +  clock-names:
>> +    items:
>> +      - const: smmu_pclk
>> +      - const: iommu_clk
>> +
>> +  reg:
>> +    maxItems: 1
>> +
>> +  interrupts:
>> +    description: Specifiers for the MMU fault interrupts.
>> +    minItems: 1
>> +    items:
>> +      - description: non-secure mode interrupt
>> +      - description: secure mode interrupt (for instances which supports it)
>> +
>> +  "#iommu-cells":
>> +    const: 1
>> +    description: |
>> +      The first cell is a phandle to the IOMMU and
>> +      the second cell is the stream id.
>> +      A single master device can be connected to more than one iommu
>> +      and multiple contexts in each of the iommu.
>> +      So multiple entries are required to list all the iommus and
>> +      the stream ids that the master is connected to.
>> +
>> +  qcom,ncb:
>> +    $ref: /schemas/types.yaml#/definitions/uint32
>> +    description: The total number of context banks in the IOMMU.
>> +
>> +required:
>> +  - clocks
>> +  - clock-names
>> +  - reg
>> +  - interrupts
>> +  - qcom,ncb
>> +
>> +additionalProperties: false
>> +
>> +examples:
>> +  - |
>> +    #include <dt-bindings/clock/qcom,mmcc-msm8960.h>
>> +
>> +    mdp_port0: iommu@7500000 {
>> +            compatible = "qcom,apq8064-iommu";
>> +            #iommu-cells = <1>;
>> +            clock-names =
>> +                "smmu_pclk",
>> +                "iommu_clk";
>> +            clocks =
>> +                <&clk SMMU_AHB_CLK>,
>> +                <&clk MDP_AXI_CLK>;
>> +            reg = <0x07500000 0x100000>;
>> +            interrupts =
>> +                <0 63 0>,
>> +                <0 64 0>;
>> +            qcom,ncb = <2>;
>> +    };
>> +
>> +    /* mdp: mdp@5100000 {
>> +            compatible = "qcom,mdp4";
>> +            ...
>> +
>> +            iommus = <&mdp_port0 0
>> +                      &mdp_port0 2>;
>> +    };*/
>> -- 
>> 2.34.1
>>
>>
-- 
David Heidelberg