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[209.17.68.221]) by smtp.gmail.com with ESMTPSA id e8-20020a056a001a8800b006cdda8519aasm14007334pfv.169.2023.12.15.16.10.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 15 Dec 2023 16:10:22 -0800 (PST) Date: Sat, 16 Dec 2023 09:10:21 +0900 From: Krzysztof =?utf-8?Q?Wilczy=C5=84ski?= To: Heiko Stuebner Cc: lpieralisi@kernel.org, bhelgaas@google.com, robh@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, quentin.schulz@theobroma-systems.com, Heiko Stuebner Subject: Re: [PATCH] dt-bindings: PCI: dwc: rockchip: document optional pcie reference clock input Message-ID: <20231216001021.GD1570493@rocinante> References: <20231206145041.667900-1-heiko@sntech.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20231206145041.667900-1-heiko@sntech.de> Hello, > On some boards the 100MHz PCIe reference clock to both controller and > devices is controllable. Add that clock to the list of clocks. > > The clock is optional, so the minItems stays the same. Applied to dt-bindings, thank you! [1/1] dt-bindings: PCI: dwc: rockchip: Document optional PCIe reference clock input https://git.kernel.org/pci/pci/c/639f666cf84e Krzysztof