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[139.178.88.99]) by mx.google.com with ESMTPS id l5-20020a170903120500b001d3485f68a4si6781452plh.416.2023.12.16.02.22.33 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 16 Dec 2023 02:22:33 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel+bounces-2149-linux.lists.archive=gmail.com@vger.kernel.org designates 139.178.88.99 as permitted sender) client-ip=139.178.88.99; Authentication-Results: mx.google.com; dkim=pass header.i=@lunn.ch header.s=20171124 header.b=tttGAFig; spf=pass (google.com: domain of linux-kernel+bounces-2149-linux.lists.archive=gmail.com@vger.kernel.org designates 139.178.88.99 as permitted sender) smtp.mailfrom="linux-kernel+bounces-2149-linux.lists.archive=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=lunn.ch Received: from smtp.subspace.kernel.org (wormhole.subspace.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by sv.mirrors.kernel.org (Postfix) with ESMTPS id 5E9EA286BC2 for ; Sat, 16 Dec 2023 10:22:33 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 2E3C715AF4; Sat, 16 Dec 2023 10:22:22 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=lunn.ch header.i=@lunn.ch header.b="tttGAFig" X-Original-To: linux-kernel@vger.kernel.org Received: from vps0.lunn.ch (vps0.lunn.ch [156.67.10.101]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 079A6154BA; Sat, 16 Dec 2023 10:22:18 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=lunn.ch Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=lunn.ch DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lunn.ch; s=20171124; h=In-Reply-To:Content-Disposition:Content-Type:MIME-Version: References:Message-ID:Subject:Cc:To:From:Date:From:Sender:Reply-To:Subject: Date:Message-ID:To:Cc:MIME-Version:Content-Type:Content-Transfer-Encoding: Content-ID:Content-Description:Content-Disposition:In-Reply-To:References; bh=UJzERdrHiCmniTvZk1ow+wfePB2FqgiF7xqz0TLJOYg=; b=tttGAFiggnURq/qt41OgKrOhaz Ldylz3BO+3TgHsaJXMo2CmmebBVKV2Ph5iTvCFfqYP4Bab+rmvbQGY1bTiB/FBi3emNkGqUyn4CXF pNt+yDq1Oh1Og7FbPJ4alEnDs4HCrjdNroCd76csnvZ/aESmk8NPNaVBG98LqzxgQrx4=; Received: from andrew by vps0.lunn.ch with local (Exim 4.94.2) (envelope-from ) id 1rERnt-0035vK-8x; Sat, 16 Dec 2023 11:21:53 +0100 Date: Sat, 16 Dec 2023 11:21:53 +0100 From: Andrew Lunn To: Jie Luo Cc: davem@davemloft.net, edumazet@google.com, kuba@kernel.org, pabeni@redhat.com, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, hkallweit1@gmail.com, linux@armlinux.org.uk, corbet@lwn.net, p.zabel@pengutronix.de, f.fainelli@gmail.com, netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, Christian Marangi Subject: Re: [PATCH v8 14/14] dt-bindings: net: ar803x: add qca8084 PHY properties Message-ID: <7c05b08a-bb6d-4fa1-8cee-c1051badc9d9@lunn.ch> References: <20231215074005.26976-1-quic_luoj@quicinc.com> <20231215074005.26976-15-quic_luoj@quicinc.com> <60b9081c-76fa-4122-b7ae-5c3dcf7229f9@lunn.ch> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: > The following is the chip package, the chip can work on the switch mode > like the existed upstream code qca8k, where PHY1-PHY4 is connected with > MAC1-MAC4 directly; Ah, that is new information, and has a big effect on the design. Can the qca8K driver be extended to drive this hardware in switch mode? Andrew