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[209.17.68.221]) by smtp.gmail.com with ESMTPSA id e25-20020aa79819000000b006ce691a1419sm948196pfl.186.2023.12.16.13.32.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 16 Dec 2023 13:32:36 -0800 (PST) Date: Sun, 17 Dec 2023 06:32:34 +0900 From: Krzysztof =?utf-8?Q?Wilczy=C5=84ski?= To: Thippeswamy Havalige Cc: linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, bhelgaas@google.com, lpieralisi@kernel.org, robh@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, michal.simek@amd.com, bharat.kumar.gogada@amd.com Subject: Re: [PATCH v7 RESEND 0/3] Add support for Xilinx XDMA Soft IP as Root Port. Message-ID: <20231216213234.GC3302836@rocinante> References: <20231003173453.938190-1-thippeswamy.havalige@amd.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20231003173453.938190-1-thippeswamy.havalige@amd.com> Hello, > This series of patch add support for Xilinx XDMA Soft IP as Root Port. > > The Xilinx XDMA Soft IP support's 32 bit and 64bit BAR's. > As Root Port it supports MSI and legacy interrupts. > > For code reusability existing CPM4 error interrupt bits are moved to > common header. Applied to controller/xilinx-xdma, thank you! [01/03] PCI: xilinx-cpm: Move IRQ definitions to a common header https://git.kernel.org/pci/pci/c/a977ee945e94 [02/03] dt-bindings: PCI: xilinx-xdma: Add schemas for Xilinx XDMA PCIe Root Port Bridge https://git.kernel.org/pci/pci/c/4ae1cd7d4be2 [03/03] PCI: xilinx-xdma: Add Xilinx XDMA Root Port driver https://git.kernel.org/pci/pci/c/8d786149d78c Krzysztof