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From: jingbao qiu <qiujingbao.dlmu@gmail.com>
Date: Sun, 17 Dec 2023 21:16:39 +0800
Message-ID: <CAJRtX8TQ02swRqzNfPHPrcS-MU=pBN_atjV2PFsAyJeNBF8kgA@mail.gmail.com>
Subject: Re: [PATCH v2 1/3] dt-bindings: rtc: sophgo: add RTC support for
 Sophgo CV1800 series SoC
To: Conor Dooley <conor@kernel.org>
Cc: a.zummo@towertech.it, alexandre.belloni@bootlin.com, robh+dt@kernel.org, 
	krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, chao.wei@sophgo.com, 
	unicorn_wang@outlook.com, paul.walmsley@sifive.com, palmer@dabbelt.com, 
	aou@eecs.berkeley.edu, linux-rtc@vger.kernel.org, devicetree@vger.kernel.org, 
	linux-kernel@vger.kernel.org, dlan@gentoo.org
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On Sun, Dec 17, 2023 at 8:26=E2=80=AFPM Conor Dooley <conor@kernel.org> wro=
te:
>
> On Sun, Dec 17, 2023 at 07:09:50PM +0800, Jingbao Qiu wrote:
>
> > +  reg:
> > +    items:
> > +      - description: data register
> > +      - description: control register
>
> > +    rtc@5025000{
> > +      compatible =3D "sophgo,cv1800-rtc";
> > +      reg =3D <0x5025000 0x1000>, <0x5026000 0x1000>;
>
> Why are these two regions rather than just one, given they are located
> next to one another?
> Are they separate on one of the other devices in this family?
>
> Thanks,
> Conor.
>

I think there are two reasons, the first one is to distinguish
different logical ,
REG_ CTRL (base on 0x5025000) controls clock calibration, sleep,and other
functions, RTC_ CORE (base on 0x5026000) has basic RTC functionality,
The second is the maximum address used by RTC_CTRL (base on 0x5025000)
is 0x0ac,which is much smaller than 0x1000. Therefore, the datasheet divide=
s
it into two parts for introduction, and I also divide it into two
parts based on this
introduction.So do you suggest that I merge them together=EF=BC=9F

Best regards,
Jingbao Qiu


> > +      clocks =3D <&osc>;
> > +      interrupts =3D <17 IRQ_TYPE_LEVEL_HIGH>;
> > +    };
>