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From: Bjorn Andersson <andersson@kernel.org>
To: agross@kernel.org,
	konrad.dybcio@linaro.org,
	Mukesh Ojha <quic_mojha@quicinc.com>
Cc: linux-arm-msm@vger.kernel.org,
	linux-kernel@vger.kernel.org,
	Atul Dhudase <quic_adhudase@quicinc.com>
Subject: Re: [PATCH v2] soc: qcom: llcc: Fix dis_cap_alloc and retain_on_pc configuration
Date: Sun, 17 Dec 2023 11:21:24 -0600
Message-ID: <170283349417.66089.10497643268198986274.b4-ty@kernel.org>
In-Reply-To: <1701876771-10695-1-git-send-email-quic_mojha@quicinc.com>
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On Wed, 06 Dec 2023 21:02:51 +0530, Mukesh Ojha wrote:
> Commit c14e64b46944 ("soc: qcom: llcc: Support chipsets that can
>  write to llcc") add the support for chipset where capacity based
> allocation and retention through power collapse can be programmed
> based on content of SCT table mentioned in the llcc driver where
> the target like sdm845 where the entire programming related to it
> is controlled in firmware. However, the commit introduces a bug
> where capacity/retention register get overwritten each time it
> gets programmed for each slice and that results in misconfiguration
> of the register based on SCT table and that is not expected
> behaviour instead it should be read modify write to retain the
> configuration of other slices.
> 
> [...]

Applied, thanks!

[1/1] soc: qcom: llcc: Fix dis_cap_alloc and retain_on_pc configuration
      commit: eed6e57e9f3e2beac37563eb6a0129549daa330e

Best regards,
-- 
Bjorn Andersson <andersson@kernel.org>