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bh=goOkV/j+8n7xf5oq2/AgXGIm/vSbN9pRUXbhB8YUgtM=; b=sI8GsJwTkstSF0eLY9kc6JKWKKUjgyu7s5KKFw2e3ZEC2aRokYjpwnvQ7Be8Rh8mwn TWhAOc5iUYgnnCZW7V8fPuJ4mLakr1cqS/b8pDatxHMKzYoGRW8jHWaQnsqVG/wxsUO8 mSHa63B6j2nMJdQIdLJPfofCnn5r0stmKnD4W8j6BcW7RAoh2k0Q4CXaA2oJuLJb+ZK3 NwDw8bcIMa6BwzkQC4Crf6i0fbN6DL6p8WHxFoLLMaZXOmSWECs1X/bjesRlO02b4ohx OWQGtZm7qVWajPZItBGvy7t4SP5CsWOstx/pfO0ghPrSBRv/fzUVAdpbP9hHR2wp2JUI c22A== X-Gm-Message-State: AOJu0Yy1cDGu1kgc+q9c19CBnFxiPuJvqw6ekk3PLVgUFW5fzSnvOrnj 7+ZQehpf3wNXmw4NOr9XAwU0TSZkl3KLzqRr+kDX9g== X-Received: by 2002:a2e:9dd5:0:b0:2cc:6066:3c19 with SMTP id x21-20020a2e9dd5000000b002cc60663c19mr587687ljj.64.1702862990901; Sun, 17 Dec 2023 17:29:50 -0800 (PST) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 References: <20231217180836.584828-1-anshulusr@gmail.com> In-Reply-To: From: David Lechner Date: Sun, 17 Dec 2023 19:29:40 -0600 Message-ID: Subject: Re: [PATCH v2 1/2] dt-bindings: iio: dac: add MCP4821 To: Anshul Dalal Cc: linux-kernel@vger.kernel.org, linux-iio@vger.kernel.org, Jonathan Cameron , devicetree@vger.kernel.org, Conor Dooley , Lars-Peter Clausen , Rob Herring , Krzysztof Kozlowski , linux-kernel-mentees@lists.linuxfoundation.org, Shuah Khan , Conor Dooley Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Sun, Dec 17, 2023 at 7:25=E2=80=AFPM David Lechner wrote: > > On Sun, Dec 17, 2023 at 12:11=E2=80=AFPM Anshul Dalal wrote: > > > > Adds support for MCP48xx series of DACs. > > > > Datasheet: https://ww1.microchip.com/downloads/en/DeviceDoc/22244B.pdf = #MCP48x1 > > Datasheet: https://ww1.microchip.com/downloads/en/DeviceDoc/20002249B.p= df #MCP48x2 > > Reviewed-by: Conor Dooley > > Signed-off-by: Anshul Dalal > > > > --- > > > > Changes for v2: > > - Changed order in device table to numerical > > - Made vdd_supply required > > - Added 'Reviewed-by: Conor Dooley' > > > > Previous versions: > > v1: https://lore.kernel.org/lkml/20231117073040.685860-1-anshulusr@gmai= l.com/ > > --- > > .../bindings/iio/dac/microchip,mcp4821.yaml | 64 +++++++++++++++++++ > > 1 file changed, 64 insertions(+) > > create mode 100644 Documentation/devicetree/bindings/iio/dac/microchip= ,mcp4821.yaml > > > > diff --git a/Documentation/devicetree/bindings/iio/dac/microchip,mcp482= 1.yaml b/Documentation/devicetree/bindings/iio/dac/microchip,mcp4821.yaml > > new file mode 100644 > > index 000000000000..97da9f9ef450 > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/iio/dac/microchip,mcp4821.yaml > > @@ -0,0 +1,64 @@ > > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) > > +%YAML 1.2 > > +--- > > +$id: http://devicetree.org/schemas/iio/dac/microchip,mcp4821.yaml# > > +$schema: http://devicetree.org/meta-schemas/core.yaml# > > + > > +title: Microchip MCP4821 and similar DACs > > + > > +description: | > > + Supports MCP48x1 (single channel) and MCP48x2 (dual channel) series = of DACs. > > + Device supports simplex communication over SPI in Mode 0,1 and Mode = 1,1. > > It seems like SPI modes usually only have one number in them, i.e. > mode 1 and mode 3 in this case, I'm guessing. Oh, and doesn't this mean that we need to include spi-cpha and spi-cpol properties since they aren't implicit in the bindings anymore since [1]? [1]: https://lore.kernel.org/all/20220722191539.90641-2-krzysztof.kozlowski= @linaro.org/ > > > + > > + +---------+--------------+-------------+ > > + | Device | Resolution | Channels | > > + |---------|--------------|-------------| > > + | MCP4801 | 8-bit | 1 | > > + | MCP4802 | 8-bit | 2 | > > + | MCP4811 | 10-bit | 1 | > > + | MCP4812 | 10-bit | 2 | > > + | MCP4821 | 12-bit | 1 | > > + | MCP4822 | 12-bit | 2 | > > + +---------+--------------+-------------+ > > + > > + Datasheet: > > + MCP48x1: https://ww1.microchip.com/downloads/en/DeviceDoc/22244B.p= df > > + MCP48x2: https://ww1.microchip.com/downloads/en/DeviceDoc/20002249= B.pdf > > + > > +maintainers: > > + - Anshul Dalal > > + > > +properties: > > + compatible: > > + enum: > > + - microchip,mcp4801 > > + - microchip,mcp4802 > > + - microchip,mcp4811 > > + - microchip,mcp4812 > > + - microchip,mcp4821 > > + - microchip,mcp4822 > > + > > + reg: > > + maxItems: 1 > > + > > + vdd-supply: true > > What about the SHDN and LDAC pins? It seems like all should have an > ldac-gpios property and MCP48x1 should have a shdn-gpios property for > these. > > > + > > +required: > > + - compatible > > + - reg > > + - vdd-supply > > + > > +additionalProperties: false > > + > > +examples: > > + - | > > + spi { > > + #address-cells =3D <1>; > > + #size-cells =3D <0>; > > + > > + dac@0 { > > + compatible =3D "microchip,mcp4821"; > > + reg =3D <0>; > > + vdd-supply =3D <&vdd_regulator>; > > + }; > > + }; > > -- > > 2.43.0 > > > >