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Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Emil Renner Berthing , Samin Guo , Paul Walmsley , Palmer Dabbelt , Albert Ou , Hal Feng , Michael Turquette , Stephen Boyd , Alexandre Torgue , Jose Abreu , Maxime Coquelin , Richard Cochran , Giuseppe Cavallaro , netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, linux-clk@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, kernel@collabora.com, Emil Renner Berthing References: <20231215204050.2296404-1-cristian.ciocaltea@collabora.com> <20231215204050.2296404-7-cristian.ciocaltea@collabora.com> From: Cristian Ciocaltea In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 12/17/23 19:55, Andrew Lunn wrote: > On Fri, Dec 15, 2023 at 10:40:45PM +0200, Cristian Ciocaltea wrote: >> The StarFive VisionFive V1 SBC uses a Motorcomm YT8521 PHY supporting >> RGMII-ID, but requires manual adjustment of the RX internal delay to >> work properly. >> >> The default RX delay provided by the driver is 1.95 ns, which proves to >> be too high. Applying a 50% reduction seems to mitigate the issue. >> >> Also note this adjustment is not necessary on BeagleV Starlight SBC, >> which uses a Microchip PHY. Hence, there is no indication of a >> miss-behaviour on the GMAC side, but most likely the issue stems from >> the Motorcomm PHY. > > I suggest you make a similar comment in the .dts file, just to explain > the odd setting. Sure, will do, we need a v4 anyway. Thanks, Cristian