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Date: Mon, 18 Dec 2023 14:23:12 +0200
From: Mika Westerberg <mika.westerberg@linux.intel.com>
To: Sanath S <sanaths2@amd.com>
Cc: Sanath S <Sanath.S@amd.com>, mario.limonciello@amd.com,
	andreas.noever@gmail.com, michael.jamet@intel.com,
	YehezkelShB@gmail.com, linux-usb@vger.kernel.org,
	linux-kernel@vger.kernel.org
Subject: Re: [Patch v2 2/2] thunderbolt: Teardown tunnels and reset
 downstream ports created by boot firmware
Message-ID: <20231218122312.GE1074920@black.fi.intel.com>
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In-Reply-To: <20231218113151.GC1074920@black.fi.intel.com>

On Mon, Dec 18, 2023 at 01:31:51PM +0200, Mika Westerberg wrote:
> On Mon, Dec 18, 2023 at 04:49:13PM +0530, Sanath S wrote:
> > > The discover part should not do anything (like write the hardware) so
> > > perhaps it is just some timing thing (but that's weird too).
> > > 
> > > I think we should do something like this:
> > > 
> > > 1. Disable all enabled protocol adapters (reset them to defaults).
> > > 2. Clear all protocol adapter paths.
> > > 3. Issue DPR over all enabled USB4 ports.
> > > 
> > > BTW, what you mean "didn't work"?
> > Path activation would go fine after DPR like below:
> > 
> > [   15.090905] thunderbolt 0000:c4:00.5: 0:5 <-> 2:9 (PCI): activating
> > [   15.090932] thunderbolt 0000:c4:00.5: activating PCIe Down path from 0:5
> > to 2:9
> > [   15.091602] thunderbolt 0000:c4:00.5: activating PCIe Up path from 2:9 to
> > 0:5
> > 
> > But, PCIE enumeration doesn't happen (pcie link up will not happen, will not
> > see below logs)
> > [   15.134223] pcieport 0000:00:03.1: pciehp: Slot(0-1): Card present
> > [   15.134243] pcieport 0000:00:03.1: pciehp: Slot(0-1): Link Up
> 
> Okay, what if you like reset the PCIe adapter config spaces back to the
> defaults? Just as an experiment.

If this turns out to be really complex then I guess it is better to do
it like you did originally using discovery but at least it would be nice
to see what the end result of this experiment looks like :)