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[147.75.80.249]) by mx.google.com with ESMTPS id s10-20020a056402520a00b00551dbbefa56si5568350edd.563.2023.12.18.07.36.55 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 18 Dec 2023 07:36:55 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel+bounces-3939-linux.lists.archive=gmail.com@vger.kernel.org designates 147.75.80.249 as permitted sender) client-ip=147.75.80.249; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=VAQNKWcE; spf=pass (google.com: domain of linux-kernel+bounces-3939-linux.lists.archive=gmail.com@vger.kernel.org designates 147.75.80.249 as permitted sender) smtp.mailfrom="linux-kernel+bounces-3939-linux.lists.archive=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: from smtp.subspace.kernel.org (wormhole.subspace.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by am.mirrors.kernel.org (Postfix) with ESMTPS id D44401F24E18 for ; Mon, 18 Dec 2023 15:34:42 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 17A6D3D564; Mon, 18 Dec 2023 15:34:34 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="VAQNKWcE" X-Original-To: linux-kernel@vger.kernel.org Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3870B1D137; Mon, 18 Dec 2023 15:34:32 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 8D5B7C433C7; Mon, 18 Dec 2023 15:34:29 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1702913672; bh=JcaGFOxBdAWGxXi0BmXm9oDYVTLNqgQcR2Pq85HZItc=; h=Date:Subject:To:Cc:References:From:In-Reply-To:From; b=VAQNKWcEUkRWFjq6tpWYpQJzK2EUmIc9yeAFj8v+mWi4FsWAhIil3Jh8aBpZgvqPh 0uQptdIHnawvGbZR1g93gc79o4LGnarrfoHFCWCYBLx2Ffgk2WHm3iGH2Hcfm5BVHu QlF8lC+M72l0dssDpPTrklriIUEfDVOZKgMHannI56uzru7PwMhLoXGKkuksDcVek7 PxhuJ7PlZTzhPxpeQrx5K/T0WGdBaPWi2X/zDWM687OlJPfyawMCAGx5DjRV79esJC hnuLhOkFntCahq7G7Mas8avhe2rKd4+TgjYrAzZYssZ5TJxvf5j3wz94PYPqj98kog brUGx8y70iY5Q== Message-ID: <239a5cbc-126f-4c27-bbbc-2b8b102716d5@kernel.org> Date: Mon, 18 Dec 2023 17:34:26 +0200 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH net-next v9 08/10] net: ethernet: ti: am65-cpsw: add mqprio qdisc offload in channel mode To: Simon Horman Cc: davem@davemloft.net, edumazet@google.com, kuba@kernel.org, pabeni@redhat.com, shuah@kernel.org, vladimir.oltean@nxp.com, s-vadapalli@ti.com, r-gunasekaran@ti.com, vigneshr@ti.com, srk@ti.com, p-varis@ti.com, netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-kselftest@vger.kernel.org References: <20231215132048.43727-1-rogerq@kernel.org> <20231215132048.43727-9-rogerq@kernel.org> <20231218134326.GD6288@kernel.org> Content-Language: en-US From: Roger Quadros In-Reply-To: <20231218134326.GD6288@kernel.org> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Hi Simon, On 18/12/2023 15:43, Simon Horman wrote: > On Fri, Dec 15, 2023 at 03:20:46PM +0200, Roger Quadros wrote: >> From: Grygorii Strashko >> >> This patch adds MQPRIO Qdisc offload in full 'channel' mode which allows >> not only setting up pri:tc mapping, but also configuring TX shapers >> (rate-limiting) on external port FIFOs. >> >> The MQPRIO Qdisc offload is expected to work with or without VLAN/priority >> tagged packets. >> >> The CPSW external Port FIFO has 8 Priority queues. The rate-limit can be >> set for each of these priority queues. Which Priority queue a packet is >> assigned to depends on PN_REG_TX_PRI_MAP register which maps header >> priority to switch priority. >> >> The header priority of a packet is assigned via the RX_PRI_MAP_REG which >> maps packet priority to header priority. >> >> The packet priority is either the VLAN priority (for VLAN tagged packets) >> or the thread/channel offset. >> >> For simplicity, we assign the same priority queue to all queues of a >> Traffic Class so it can be rate-limited correctly. >> >> Configuration example: >> ethtool -L eth1 tx 5 >> ethtool --set-priv-flags eth1 p0-rx-ptype-rrobin off >> >> tc qdisc add dev eth1 parent root handle 100: mqprio num_tc 3 \ >> map 0 0 1 2 0 0 0 0 0 0 0 0 0 0 0 0 \ >> queues 1@0 1@1 1@2 hw 1 mode channel \ >> shaper bw_rlimit min_rate 0 100mbit 200mbit max_rate 0 101mbit 202mbit >> >> tc qdisc replace dev eth2 handle 100: parent root mqprio num_tc 1 \ >> map 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 queues 1@0 hw 1 >> >> ip link add link eth1 name eth1.100 type vlan id 100 >> ip link set eth1.100 type vlan egress 0:0 1:1 2:2 3:3 4:4 5:5 6:6 7:7 >> >> In the above example two ports share the same TX CPPI queue 0 for low >> priority traffic. 3 traffic classes are defined for eth1 and mapped to: >> TC0 - low priority, TX CPPI queue 0 -> ext Port 1 fifo0, no rate limit >> TC1 - prio 2, TX CPPI queue 1 -> ext Port 1 fifo1, CIR=100Mbit/s, EIR=1Mbit/s >> TC2 - prio 3, TX CPPI queue 2 -> ext Port 1 fifo2, CIR=200Mbit/s, EIR=2Mbit/s >> >> Signed-off-by: Grygorii Strashko >> Signed-off-by: Roger Quadros > > ... > >> diff --git a/drivers/net/ethernet/ti/am65-cpsw-qos.c b/drivers/net/ethernet/ti/am65-cpsw-qos.c >> index 9f0a05e763d1..7ad7af3b3c60 100644 >> --- a/drivers/net/ethernet/ti/am65-cpsw-qos.c >> +++ b/drivers/net/ethernet/ti/am65-cpsw-qos.c >> @@ -7,6 +7,7 @@ >> */ >> >> #include >> +#include >> #include >> #include >> >> @@ -15,6 +16,8 @@ >> #include "am65-cpts.h" >> #include "cpsw_ale.h" >> >> +#define TO_MBPS(x) DIV_ROUND_UP((x), BYTES_PER_MBIT) > > Hi Grygorii and Roger, > > a minor nit from my side: in order for BYTES_PER_MBIT to be defined > linux/units.h needs to be included. But that isn't added until > the next patch. Thanks for the catch. I'll fix it in next spin. -- cheers, -roger