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[147.75.199.223]) by mx.google.com with ESMTPS id pe34-20020a05620a852200b0077d7c33e00bsi15530784qkn.369.2023.12.19.01.32.07 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 19 Dec 2023 01:32:07 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel+bounces-4965-linux.lists.archive=gmail.com@vger.kernel.org designates 147.75.199.223 as permitted sender) client-ip=147.75.199.223; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel+bounces-4965-linux.lists.archive=gmail.com@vger.kernel.org designates 147.75.199.223 as permitted sender) smtp.mailfrom="linux-kernel+bounces-4965-linux.lists.archive=gmail.com@vger.kernel.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: from smtp.subspace.kernel.org (wormhole.subspace.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ny.mirrors.kernel.org (Postfix) with ESMTPS id 4B6A91C23CA8 for ; Tue, 19 Dec 2023 09:32:07 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 7B05513ADF; Tue, 19 Dec 2023 09:31:59 +0000 (UTC) X-Original-To: linux-kernel@vger.kernel.org Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 156AF14A8F; Tue, 19 Dec 2023 09:31:55 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 0CC9E1FB; Tue, 19 Dec 2023 01:32:38 -0800 (PST) Received: from [10.57.85.227] (unknown [10.57.85.227]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 6A8CC3F738; Tue, 19 Dec 2023 01:31:51 -0800 (PST) Message-ID: Date: Tue, 19 Dec 2023 09:32:56 +0000 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v5 23/23] Documentation: EM: Update with runtime modification design Content-Language: en-US To: Xuewen Yan Cc: linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, rafael@kernel.org, dietmar.eggemann@arm.com, rui.zhang@intel.com, amit.kucheria@verdurent.com, amit.kachhap@gmail.com, daniel.lezcano@linaro.org, viresh.kumar@linaro.org, len.brown@intel.com, pavel@ucw.cz, mhiramat@kernel.org, qyousef@layalina.io, wvw@google.com References: <20231129110853.94344-1-lukasz.luba@arm.com> <20231129110853.94344-24-lukasz.luba@arm.com> From: Lukasz Luba In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit On 12/19/23 06:22, Xuewen Yan wrote: > Hi Lukasz, > > On Wed, Nov 29, 2023 at 7:11 PM Lukasz Luba wrote: [snip] >> + >> + -> drivers/soc/example/example_em_mod.c >> + >> + 01 static void foo_get_new_em(struct device *dev) > > Because now some drivers use the dev_pm_opp_of_register_em() to > register energy model, > and maybe we can add a new function to update the energy model using > "EM_SET_ACTIVE_POWER_CB(em_cb, cb)" > instead of letting users set power again? > There are different usage of this EM feature: 1. Adjust power values after boot is finish and e.g. ASV in Exynos has adjusted new voltage values in the OPP framework. It's due to chip binning. I have described that in conversation below patch 22/23. I'm going to send a patch for that platform and OPP fwk later as a follow up to this series. 2. Change the EM power values after long gaming, when the GPU heats up the SoC heavily and CPUs start increase the leakage 3. Change the EM for long running heavy apps, e.g. video conference app, which is using camera w/ image AI and filters (so some heavy stuff) 4. any other optimization that vendor/OEM like to have for