Received: by 2002:a05:7412:8598:b0:f9:33c2:5753 with SMTP id n24csp515777rdh; Tue, 19 Dec 2023 06:03:09 -0800 (PST) X-Google-Smtp-Source: AGHT+IGcxVkRbulEZ/oqRg1KdBt8k8XzJodtDz8pBB9DkezWSkZx1c1uUY1VAaTytPaEJ54+m8nK X-Received: by 2002:a50:d616:0:b0:54d:8ba6:718b with SMTP id x22-20020a50d616000000b0054d8ba6718bmr1281862edi.0.1702994589447; Tue, 19 Dec 2023 06:03:09 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1702994589; cv=none; d=google.com; s=arc-20160816; b=fVguhzprKg5Xd0ggAsbylVzNPtVlCGQF7+47RbCFdLjo3++d+UApr79onAtEXiaq/0 i2oT+tw9+48OakW/eOLMlt+hRvrDncOkC9cpflbCtqxdEpHnlo0o3Tj16rUmAIMTzIVU 3wGhJnP1SqDGDTguR1osjIwv6VJ/PaJZQ2scU+Vox1Vq5t8hsGAEwS5EC186NWBxdH4S u0QNi9owiTj6fgcTBmnAlycJqIYWp28lu58QkqaTAg5z99QiA11AaMVYIfyeqnNaHkC5 OOZetIrjXn5i+y3IT8QTXl6GK/cdNvRscgmoxUU9uXTQr/UNx5KVzkPu1OazeNNcGael Vudw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:mime-version:list-unsubscribe :list-subscribe:list-id:precedence:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=e0tfyB01E/wisKbun34LfLAj5ZPKJ+Ood1yryJAqyic=; fh=sBR62XK5J/K69ZxIf6WTNdH3VNJVSyhmbirrBqIlNMs=; b=L4Do6pavE2fq9JsH6fvj+qTW4Rjc5wEKoVj2Xw4OTV3PMN64W+jQc5chUdXc5UXCz8 8KSQRv/yh1p2EtVlOtv0HHohAnwClQIB47t1lE7aydT+pD9pWvyg7yoSWp+GaDXcbrxe oxn8xKYDzUnzNm5Jrq6y3mNGYEhb8apDPAAl6ZDU4kYbiddD7GtztPXhBkZJ6tyoio3/ rdr2KPFb+ymuzI96J+R5KJm+BcH9K0y1L1nr9ovgAPcM9n40TgvLMVdYLDFKRx0px77G j/Jy8bBIrVzGH26VYvIOHt45gipOgrtwh0kaLjawzgH2YPbQkk9ovK2aM2HOW7ERvcOZ edEA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@quicinc.com header.s=qcppdkim1 header.b=Sp7BhG4i; spf=pass (google.com: domain of linux-kernel+bounces-5306-linux.lists.archive=gmail.com@vger.kernel.org designates 2604:1380:4601:e00::3 as permitted sender) smtp.mailfrom="linux-kernel+bounces-5306-linux.lists.archive=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=quicinc.com Return-Path: Received: from am.mirrors.kernel.org (am.mirrors.kernel.org. [2604:1380:4601:e00::3]) by mx.google.com with ESMTPS id s18-20020a508d12000000b005533f0fd2aesi2095382eds.588.2023.12.19.06.03.09 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 19 Dec 2023 06:03:09 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel+bounces-5306-linux.lists.archive=gmail.com@vger.kernel.org designates 2604:1380:4601:e00::3 as permitted sender) client-ip=2604:1380:4601:e00::3; Authentication-Results: mx.google.com; dkim=pass header.i=@quicinc.com header.s=qcppdkim1 header.b=Sp7BhG4i; spf=pass (google.com: domain of linux-kernel+bounces-5306-linux.lists.archive=gmail.com@vger.kernel.org designates 2604:1380:4601:e00::3 as permitted sender) smtp.mailfrom="linux-kernel+bounces-5306-linux.lists.archive=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=quicinc.com Received: from smtp.subspace.kernel.org (wormhole.subspace.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by am.mirrors.kernel.org (Postfix) with ESMTPS id 333CF1F21741 for ; Tue, 19 Dec 2023 14:03:09 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id A2E471A72F; Tue, 19 Dec 2023 14:03:00 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b="Sp7BhG4i" X-Original-To: linux-kernel@vger.kernel.org Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B23A81C281; Tue, 19 Dec 2023 14:02:58 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=quicinc.com Received: from pps.filterd (m0279867.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.24/8.17.1.24) with ESMTP id 3BJDGJ8H023602; Tue, 19 Dec 2023 14:02:51 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h= from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding:content-type; s= qcppdkim1; bh=e0tfyB01E/wisKbun34LfLAj5ZPKJ+Ood1yryJAqyic=; b=Sp 7BhG4ixtzbWqQxlNVMe4T55VMY/VJ/iCc5zFlM0qb7/yZwn3Jibipk0nbHUllJwO GJLu0UMI+J8e3FPuwwE3Aq/O7wGkbt4/behLzon9/1crytiSQcOb1n9eKfXVZVcQ hq6GFtUfynBdPahb729xgmE+u1F584v+CFDV6JOWGZR+aOhWs5Igl9BW2QzWpvd8 FVek/tZAPqKaWcZfc3dQnx2uBJ2ff/TndVrpIUKPiLim5LTgAYtj5LvKSLVQY87+ FW6Kg9A2TXc/1O8VKvjZE6MDeb9AlT01uoCT1NTRaNwEfwMSTfqTc8RKligT7vfi 7uHCoRWDIbZxc6AkX0aA== Received: from nalasppmta04.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3v37vxrrag-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 19 Dec 2023 14:02:51 +0000 (GMT) Received: from nalasex01c.na.qualcomm.com (nalasex01c.na.qualcomm.com [10.47.97.35]) by NALASPPMTA04.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 3BJE2oeT026929 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 19 Dec 2023 14:02:50 GMT Received: from akronite-sh-dev02.qualcomm.com (10.80.80.8) by nalasex01c.na.qualcomm.com (10.47.97.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.40; Tue, 19 Dec 2023 06:02:46 -0800 From: Luo Jie To: , , , , , , , CC: , , , , Subject: [PATCH v13 1/4] clk: qcom: branch: Add clk_branch2_prepare_ops Date: Tue, 19 Dec 2023 22:02:26 +0800 Message-ID: <20231219140229.19062-2-quic_luoj@quicinc.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20231219140229.19062-1-quic_luoj@quicinc.com> References: <20231219140229.19062-1-quic_luoj@quicinc.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01c.na.qualcomm.com (10.47.97.35) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: f6MXM-RJQfwtiDKznGGY8-3DlLW8i-Uf X-Proofpoint-GUID: f6MXM-RJQfwtiDKznGGY8-3DlLW8i-Uf X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.997,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-12-09_02,2023-12-07_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxlogscore=773 suspectscore=0 impostorscore=0 lowpriorityscore=0 malwarescore=0 bulkscore=0 phishscore=0 spamscore=0 clxscore=1011 mlxscore=0 adultscore=0 priorityscore=1501 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2311290000 definitions=main-2312190105 Add the clk_branch2_prepare_ops for supporting clock controller where the hardware register is accessed by MDIO bus, and the spin lock can't be used because of sleep during the MDIO operation. The clock is enabled by the .prepare instead of .enable when the clk_branch2_prepare_ops is used. Signed-off-by: Luo Jie Acked-by: Stephen Boyd --- drivers/clk/qcom/clk-branch.c | 7 +++++++ drivers/clk/qcom/clk-branch.h | 1 + 2 files changed, 8 insertions(+) diff --git a/drivers/clk/qcom/clk-branch.c b/drivers/clk/qcom/clk-branch.c index c1dba33ac31a..229480c5b075 100644 --- a/drivers/clk/qcom/clk-branch.c +++ b/drivers/clk/qcom/clk-branch.c @@ -191,3 +191,10 @@ const struct clk_ops clk_branch_simple_ops = { .is_enabled = clk_is_enabled_regmap, }; EXPORT_SYMBOL_GPL(clk_branch_simple_ops); + +const struct clk_ops clk_branch2_prepare_ops = { + .prepare = clk_branch2_enable, + .unprepare = clk_branch2_disable, + .is_prepared = clk_is_enabled_regmap, +}; +EXPORT_SYMBOL_GPL(clk_branch2_prepare_ops); diff --git a/drivers/clk/qcom/clk-branch.h b/drivers/clk/qcom/clk-branch.h index 8ffed603c050..370407afe1c2 100644 --- a/drivers/clk/qcom/clk-branch.h +++ b/drivers/clk/qcom/clk-branch.h @@ -103,6 +103,7 @@ extern const struct clk_ops clk_branch2_ops; extern const struct clk_ops clk_branch_simple_ops; extern const struct clk_ops clk_branch2_aon_ops; extern const struct clk_ops clk_branch2_mem_ops; +extern const struct clk_ops clk_branch2_prepare_ops; #define to_clk_branch(_hw) \ container_of(to_clk_regmap(_hw), struct clk_branch, clkr) -- 2.42.0