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[2604:1380:4601:e00::3]) by mx.google.com with ESMTPS id j12-20020a05640211cc00b005534731ef7asi2052802edw.678.2023.12.19.09.08.09 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 19 Dec 2023 09:08:09 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel+bounces-5642-linux.lists.archive=gmail.com@vger.kernel.org designates 2604:1380:4601:e00::3 as permitted sender) client-ip=2604:1380:4601:e00::3; Authentication-Results: mx.google.com; dkim=pass header.i=@gmail.com header.s=20230601 header.b=hDVMarUX; spf=pass (google.com: domain of linux-kernel+bounces-5642-linux.lists.archive=gmail.com@vger.kernel.org designates 2604:1380:4601:e00::3 as permitted sender) smtp.mailfrom="linux-kernel+bounces-5642-linux.lists.archive=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Received: from smtp.subspace.kernel.org (wormhole.subspace.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by am.mirrors.kernel.org (Postfix) with ESMTPS id 1BB391F23D30 for ; Tue, 19 Dec 2023 17:08:09 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 9DAEF40C1D; Tue, 19 Dec 2023 17:01:33 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="hDVMarUX" X-Original-To: linux-kernel@vger.kernel.org Received: from mail-wm1-f48.google.com (mail-wm1-f48.google.com [209.85.128.48]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2E7F43EA7F; Tue, 19 Dec 2023 17:01:29 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Received: by mail-wm1-f48.google.com with SMTP id 5b1f17b1804b1-40c236624edso52674115e9.1; Tue, 19 Dec 2023 09:01:29 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1703005288; x=1703610088; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=6i2p9YgvuxkTu14agPnwE9rj1vc0S1z9mKZiq597B/g=; b=hDVMarUXjYkRfpoTSkbQgZjwX9ibXocGTKvV2wb0vILQ2bZFdn5EFRvchEUMLx/YzX dScIannKKTeWdY3Jhzn9sPbRiSRavGE5T1ILPqU7SEYkFsIkVtGzUmntpdqckD5ZXfFv hudDjSikpWsnntNH7QuuYrgwPBNlzfjPpdDIn1wKv9Hj7LISoTdYn+2AtJL3Ev/2TTQc jlJ4B+oub1S0BMyEShRV7azYipZGjXYpwKrclijpASC7rsIz3UzfDo2OOqkU3/mfhq0d /a2Be4kO4uL1KuPv/LBwZnHHBLJgpUA3yiB6tV9q+lAVl4Y17uelFGSoNwyUurlvry3y j5sA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1703005288; x=1703610088; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=6i2p9YgvuxkTu14agPnwE9rj1vc0S1z9mKZiq597B/g=; b=d9FarpnoTU0A4rGN4F93buWgfCRwX0HWdsPooW7Yxh/QaH/Ho3d0nvdsNB1tGSOjER vlz93RVWRbkwcvmamZkPJ75VV60w6cWKrvt+57kanrEYrjZgJe02dZt893XbtFpoFUEy V0qQfqQk/1IoRSG8+x0mmbfsyApfOhFW40viPT8ymFd5cXVX2LOoKxEilTr3RUPKMGWT s2LDcO1RFUxW7ZO9NlcaVhfEfabvvPW1aTpEf5x8bN0ZCtpbK6fBMkxGdFQm41RCFALo wCGI0+HF9lBLkjbRaa7Q2sZSl3DERux28cBiVfDF7kYqh9GUuzFMeF7C5hZfw981QTfd js8g== X-Gm-Message-State: AOJu0YxHSFBFnHeQKTJkodtsgBWQxL0Sv2Y5h9LMHqplbg1jZvanLUzX iT7aHztRDNoFPC5u7oBexYSBrUiQzA== X-Received: by 2002:a05:600c:1d12:b0:40c:93f:5da2 with SMTP id l18-20020a05600c1d1200b0040c093f5da2mr9354501wms.33.1703005288338; Tue, 19 Dec 2023 09:01:28 -0800 (PST) Received: from U4.lan ([2a02:810b:f40:4300:7ae5:3e:d1c6:a138]) by smtp.gmail.com with ESMTPSA id i7-20020a05600c354700b0040d2805d158sm3225878wmq.48.2023.12.19.09.01.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 19 Dec 2023 09:01:28 -0800 (PST) From: Alex Bee To: Sandy Huang , =?UTF-8?q?Heiko=20St=C3=BCbner?= , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: David Airlie , Daniel Vetter , dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Alex Bee Subject: [PATCH v3 23/29] drm/rockchip: inno_hdmi: Add variant support Date: Tue, 19 Dec 2023 18:00:53 +0100 Message-ID: <20231219170100.188800-24-knaerzche@gmail.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20231219170100.188800-1-knaerzche@gmail.com> References: <20231219170100.188800-1-knaerzche@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit In preparation to support RK3128's integration of the controller, this patch adds a simple variant implementation. They mainly differ in the phy configuration required, so those are part of the match_data. The values have been taken from downstream. The pixelclocks in there are meant to be max-inclusive. Signed-off-by: Alex Bee --- changes in v2: - no changes changes in v3: - adapt to the newly introduced inno_hdmi_power_up / inno_hdmi_standby functions drivers/gpu/drm/rockchip/inno_hdmi.c | 74 ++++++++++++++++++++++++++-- 1 file changed, 69 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/rockchip/inno_hdmi.c b/drivers/gpu/drm/rockchip/inno_hdmi.c index e21f6d7aeee6..df979bab9abd 100644 --- a/drivers/gpu/drm/rockchip/inno_hdmi.c +++ b/drivers/gpu/drm/rockchip/inno_hdmi.c @@ -26,6 +26,17 @@ #include "inno_hdmi.h" +struct inno_hdmi_phy_config { + unsigned long pixelclock; + u8 pre_emphasis; + u8 voltage_level_control; +}; + +struct inno_hdmi_variant { + struct inno_hdmi_phy_config *phy_configs; + struct inno_hdmi_phy_config *default_phy_config; +}; + struct inno_hdmi_i2c { struct i2c_adapter adap; @@ -47,6 +58,8 @@ struct inno_hdmi { struct inno_hdmi_i2c *i2c; struct i2c_adapter *ddc; + + const struct inno_hdmi_variant *variant; }; struct inno_hdmi_connector_state { @@ -113,6 +126,30 @@ static const char coeff_csc[][24] = { }, }; +static struct inno_hdmi_phy_config rk3036_hdmi_phy_configs[] = { + { 74250000, 0x3f, 0xbb }, + { 165000000, 0x6f, 0xbb }, + { ~0UL, 0x00, 0x00 } +}; + +static int inno_hdmi_find_phy_config(struct inno_hdmi *hdmi, + unsigned long pixelclk) +{ + const struct inno_hdmi_phy_config *phy_configs = + hdmi->variant->phy_configs; + int i; + + for (i = 0; phy_configs[i].pixelclock != ~0UL; i++) { + if (pixelclk <= phy_configs[i].pixelclock) + return i; + } + + DRM_DEV_DEBUG(hdmi->dev, "No phy configuration for pixelclock %lu\n", + pixelclk); + + return -EINVAL; +} + static inline u8 hdmi_readb(struct inno_hdmi *hdmi, u16 offset) { return readl_relaxed(hdmi->regs + (offset) * 0x04); @@ -164,12 +201,25 @@ static void inno_hdmi_standby(struct inno_hdmi *hdmi) hdmi_writeb(hdmi, HDMI_PHY_SYS_CTL, 0x15); }; -static void inno_hdmi_power_up(struct inno_hdmi *hdmi) +static void inno_hdmi_power_up(struct inno_hdmi *hdmi, + unsigned long mpixelclock) { + struct inno_hdmi_phy_config *phy_config; + int ret = inno_hdmi_find_phy_config(hdmi, mpixelclock); + + if (ret < 0) { + phy_config = hdmi->variant->default_phy_config; + DRM_DEV_ERROR(hdmi->dev, + "Using default phy configuration for TMDS rate %lu", + mpixelclock); + } else { + phy_config = &hdmi->variant->phy_configs[ret]; + } + inno_hdmi_sys_power(hdmi, false); - hdmi_writeb(hdmi, HDMI_PHY_PRE_EMPHASIS, 0x6f); - hdmi_writeb(hdmi, HDMI_PHY_DRIVER, 0xbb); + hdmi_writeb(hdmi, HDMI_PHY_PRE_EMPHASIS, phy_config->pre_emphasis); + hdmi_writeb(hdmi, HDMI_PHY_DRIVER, phy_config->voltage_level_control); hdmi_writeb(hdmi, HDMI_PHY_SYS_CTL, 0x15); hdmi_writeb(hdmi, HDMI_PHY_SYS_CTL, 0x14); hdmi_writeb(hdmi, HDMI_PHY_SYS_CTL, 0x10); @@ -406,6 +456,7 @@ static int inno_hdmi_setup(struct inno_hdmi *hdmi, struct drm_display_mode *mode) { struct drm_display_info *display = &hdmi->connector.display_info; + unsigned long mpixelclock = mode->clock * 1000; /* Mute video and audio output */ hdmi_modb(hdmi, HDMI_AV_MUTE, m_AUDIO_MUTE | m_VIDEO_BLACK, @@ -428,13 +479,13 @@ static int inno_hdmi_setup(struct inno_hdmi *hdmi, * DCLK_LCDC, so we need to init the TMDS rate to mode pixel * clock rate, and reconfigure the DDC clock. */ - inno_hdmi_i2c_init(hdmi, mode->clock * 1000); + inno_hdmi_i2c_init(hdmi, mpixelclock); /* Unmute video and audio output */ hdmi_modb(hdmi, HDMI_AV_MUTE, m_AUDIO_MUTE | m_VIDEO_BLACK, v_AUDIO_MUTE(0) | v_VIDEO_MUTE(0)); - inno_hdmi_power_up(hdmi); + inno_hdmi_power_up(hdmi, mpixelclock); return 0; } @@ -821,6 +872,7 @@ static int inno_hdmi_bind(struct device *dev, struct device *master, struct platform_device *pdev = to_platform_device(dev); struct drm_device *drm = data; struct inno_hdmi *hdmi; + const struct inno_hdmi_variant *variant; int irq; int ret; @@ -830,6 +882,12 @@ static int inno_hdmi_bind(struct device *dev, struct device *master, hdmi->dev = dev; + variant = of_device_get_match_data(hdmi->dev); + if (!variant) + return -EINVAL; + + hdmi->variant = variant; + hdmi->regs = devm_platform_ioremap_resource(pdev, 0); if (IS_ERR(hdmi->regs)) return PTR_ERR(hdmi->regs); @@ -923,8 +981,14 @@ static void inno_hdmi_remove(struct platform_device *pdev) component_del(&pdev->dev, &inno_hdmi_ops); } +static const struct inno_hdmi_variant rk3036_inno_hdmi_variant = { + .phy_configs = rk3036_hdmi_phy_configs, + .default_phy_config = &rk3036_hdmi_phy_configs[1], +}; + static const struct of_device_id inno_hdmi_dt_ids[] = { { .compatible = "rockchip,rk3036-inno-hdmi", + .data = &rk3036_inno_hdmi_variant, }, {}, }; -- 2.43.0