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Tue, 19 Dec 2023 09:01:07 -0800 (PST) Received: from U4.lan ([2a02:810b:f40:4300:7ae5:3e:d1c6:a138]) by smtp.gmail.com with ESMTPSA id i7-20020a05600c354700b0040d2805d158sm3225878wmq.48.2023.12.19.09.01.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 19 Dec 2023 09:01:07 -0800 (PST) From: Alex Bee To: Sandy Huang , =?UTF-8?q?Heiko=20St=C3=BCbner?= , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: David Airlie , Daniel Vetter , dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Alex Bee , Conor Dooley Subject: [PATCH v3 01/29] dt-bindings: display: rockchip,inno-hdmi: Document RK3128 compatible Date: Tue, 19 Dec 2023 18:00:31 +0100 Message-ID: <20231219170100.188800-2-knaerzche@gmail.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20231219170100.188800-1-knaerzche@gmail.com> References: <20231219170100.188800-1-knaerzche@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit The integration for this SoC is different from the currently existing: It needs it's PHY's reference clock rate to calculate the DDC bus frequency correctly. The controller is also part of a powerdomain, so this gets added as an mandatory property for this variant. Signed-off-by: Alex Bee Reviewed-by: Conor Dooley --- changes in v2: - clarify that the controller itself is part of the powerdomain - simplify clock-names - made power-domains property only allowed (and required) for new variant changes in v3: - collect RB .../display/rockchip/rockchip,inno-hdmi.yaml | 40 ++++++++++++++++++- 1 file changed, 38 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/display/rockchip/rockchip,inno-hdmi.yaml b/Documentation/devicetree/bindings/display/rockchip/rockchip,inno-hdmi.yaml index 96889c86849a..be78dcfa1c76 100644 --- a/Documentation/devicetree/bindings/display/rockchip/rockchip,inno-hdmi.yaml +++ b/Documentation/devicetree/bindings/display/rockchip/rockchip,inno-hdmi.yaml @@ -14,6 +14,7 @@ properties: compatible: enum: - rockchip,rk3036-inno-hdmi + - rockchip,rk3128-inno-hdmi reg: maxItems: 1 @@ -22,10 +23,19 @@ properties: maxItems: 1 clocks: - maxItems: 1 + minItems: 1 + items: + - description: The HDMI controller main clock + - description: The HDMI PHY reference clock clock-names: - const: pclk + minItems: 1 + items: + - const: pclk + - const: ref + + power-domains: + maxItems: 1 ports: $ref: /schemas/graph.yaml#/properties/ports @@ -55,6 +65,32 @@ required: - pinctrl-names - ports +allOf: + - if: + properties: + compatible: + contains: + const: rockchip,rk3036-inno-hdmi + + then: + properties: + power-domains: false + + - if: + properties: + compatible: + contains: + const: rockchip,rk3128-inno-hdmi + + then: + properties: + clocks: + minItems: 2 + clock-names: + minItems: 2 + required: + - power-domains + additionalProperties: false examples: -- 2.43.0