Received: by 2002:a05:7412:d002:b0:f9:9049:d2ea with SMTP id bd2csp9505rdb; Wed, 20 Dec 2023 02:17:29 -0800 (PST) X-Google-Smtp-Source: AGHT+IFJe+QPy83ChQPcMcYewJdMs0/QHnvIzuwQbp/c7VNI0mimU8FBuM1jpYx+afDYj8hp2HUu X-Received: by 2002:a17:906:154:b0:a22:fb34:dab5 with SMTP id 20-20020a170906015400b00a22fb34dab5mr5552226ejh.67.1703067449337; Wed, 20 Dec 2023 02:17:29 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1703067449; cv=none; d=google.com; s=arc-20160816; b=xYfATfTk6F1yae+06ZD0EFhYWbGW/Xfjlacos512i724patPp0Un7VZKKMENByjeXI 2FTixplrCCnI8Y7osuqLFE+xW9s/ZSOxDEDgSzImWaD3nLZgoPk8Th+ffuhu2PUlPZhL mw+z3ftqui1ZcBOHHtl05fvdNKljrvnJrKZsWXXr+VcwqqybyDOSbpUkqRD5sJqyXTiN WnUwne6QTg8h9WzUrH0IUvhPlf4pFgdinFTofqr1AtHaBRhJRMqbD9raBfYWjM0rHKnY yXrvzW5CyF8E9N8UuqFneVnrflHKUquPI+G0F9PqD25N7Dv4I4/HHaqmZmahxcWqS1S8 03RA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=mime-version:list-unsubscribe:list-subscribe:list-id:precedence :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=ryL3xIPJfg8A+byFMnd2zFxavybUfKzdvdWAdO/yaJo=; fh=N25l34UKybvwssildkJfWZzd7U86IAOGhJYPnp0TxMk=; b=RHhNJhX5IoOVIkTUWJficpFwJUbLs4p/7oA4RIBK6y0pPRQ06h0bKupeT8LdLILKs7 gWGjWFTyzpc0wYOb3qjf1LSuWQLfKorxXGV9iLUICl9l5VO/VFEotvjJ+7M9o0b3Zgjb j3jmWRDc6miFaPCekVbMxTEo7pHsV877IVyAmN37gpg2b3zO+fLrUD99BbA/Ho0iSPlT MpcrRhzI968ez1Ct46h7IAQZu1UYR7F8LAFRGveJqOkcB9BK878miI0oHTL7JApv1qSa uP8r/FIk1F8KfasR0bu/p+o99HOUt9UbTKBDh7Jxt4cSX/inX2fQRfzI64gy9Nw19rVe Js6g== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@mediatek.com header.s=dk header.b=nJquP7Tv; spf=pass (google.com: domain of linux-kernel+bounces-6697-linux.lists.archive=gmail.com@vger.kernel.org designates 147.75.80.249 as permitted sender) smtp.mailfrom="linux-kernel+bounces-6697-linux.lists.archive=gmail.com@vger.kernel.org"; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=mediatek.com Return-Path: Received: from am.mirrors.kernel.org (am.mirrors.kernel.org. [147.75.80.249]) by mx.google.com with ESMTPS id q19-20020a1709060e5300b00a235a339e61si2551560eji.649.2023.12.20.02.17.29 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 20 Dec 2023 02:17:29 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel+bounces-6697-linux.lists.archive=gmail.com@vger.kernel.org designates 147.75.80.249 as permitted sender) client-ip=147.75.80.249; Authentication-Results: mx.google.com; dkim=pass header.i=@mediatek.com header.s=dk header.b=nJquP7Tv; spf=pass (google.com: domain of linux-kernel+bounces-6697-linux.lists.archive=gmail.com@vger.kernel.org designates 147.75.80.249 as permitted sender) smtp.mailfrom="linux-kernel+bounces-6697-linux.lists.archive=gmail.com@vger.kernel.org"; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=mediatek.com Received: from smtp.subspace.kernel.org (wormhole.subspace.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by am.mirrors.kernel.org (Postfix) with ESMTPS id 0DE0A1F29383 for ; Wed, 20 Dec 2023 10:10:36 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id F0533210EF; Wed, 20 Dec 2023 10:09:03 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="nJquP7Tv" X-Original-To: linux-kernel@vger.kernel.org Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3AF72210E4; Wed, 20 Dec 2023 10:08:59 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=mediatek.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=mediatek.com X-UUID: c991934e9f1f11eea5db2bebc7c28f94-20231220 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=ryL3xIPJfg8A+byFMnd2zFxavybUfKzdvdWAdO/yaJo=; b=nJquP7TvYYot3MdOdZZI2mngj2ET8VJiz5jxwG+QKEemNHIJdOhuVhfb85ttmHposySf5V2x6mjmUJMkLHeTh/fxv65z3Njk0M3CGub+IAJtrEqTLfPJe1LpYpjp0gA3YBhWIev/wbuZaQyw5T6LPcBXmxKTxSeL5xsV/hNC5d4=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.35,REQID:ffbf317f-3d71-47f4-ab0d-1cb825b3fe80,IP:0,U RL:25,TC:0,Content:0,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTION :release,TS:25 X-CID-META: VersionHash:5d391d7,CLOUDID:9e537a7e-4f93-4875-95e7-8c66ea833d57,B ulkID:nil,BulkQuantity:0,Recheck:0,SF:102,TC:nil,Content:0,EDM:-3,IP:nil,U RL:11|1,File:nil,Bulk:nil,QS:nil,BEC:nil,COL:0,OSI:0,OSA:0,AV:0,LES:1,SPR: NO,DKR:0,DKP:0,BRR:0,BRE:0 X-CID-BVR: 0 X-CID-BAS: 0,_,0,_ X-CID-FACTOR: TF_CID_SPAM_SNR,TF_CID_SPAM_ULN X-UUID: c991934e9f1f11eea5db2bebc7c28f94-20231220 Received: from mtkmbs10n2.mediatek.inc [(172.21.101.183)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 892679969; Wed, 20 Dec 2023 18:08:56 +0800 Received: from mtkmbs13n1.mediatek.inc (172.21.101.193) by mtkmbs13n1.mediatek.inc (172.21.101.193) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.26; Wed, 20 Dec 2023 18:08:55 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs13n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1118.26 via Frontend Transport; Wed, 20 Dec 2023 18:08:55 +0800 From: Moudy Ho To: Chun-Kuang Hu , Philipp Zabel , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Mauro Carvalho Chehab , Matthias Brugger , AngeloGioacchino Del Regno , Hans Verkuil CC: , , , , , , Moudy Ho Subject: [PATCH v10 08/16] dt-bindings: media: mediatek: mdp3: add component STITCH for MT8195 Date: Wed, 20 Dec 2023 18:08:45 +0800 Message-ID: <20231220100853.20616-9-moudy.ho@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20231220100853.20616-1-moudy.ho@mediatek.com> References: <20231220100853.20616-1-moudy.ho@mediatek.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain X-MTK: N Add the fundamental hardware configuration of component STITCH, which is controlled by MDP3 on MT8195. Signed-off-by: Moudy Ho Reviewed-by: Krzysztof Kozlowski Reviewed-by: AngeloGioacchino Del Regno --- .../bindings/media/mediatek,mdp3-stitch.yaml | 61 +++++++++++++++++++ 1 file changed, 61 insertions(+) create mode 100644 Documentation/devicetree/bindings/media/mediatek,mdp3-stitch.yaml diff --git a/Documentation/devicetree/bindings/media/mediatek,mdp3-stitch.yaml b/Documentation/devicetree/bindings/media/mediatek,mdp3-stitch.yaml new file mode 100644 index 000000000000..d815bea29154 --- /dev/null +++ b/Documentation/devicetree/bindings/media/mediatek,mdp3-stitch.yaml @@ -0,0 +1,61 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/mediatek,mdp3-stitch.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MediaTek Media Data Path 3 STITCH + +maintainers: + - Matthias Brugger + - Moudy Ho + +description: + One of Media Data Path 3 (MDP3) components used to combine multiple video frame + with overlapping fields of view to produce a segmented panorame. + +properties: + compatible: + enum: + - mediatek,mt8195-mdp3-stitch + + reg: + maxItems: 1 + + mediatek,gce-client-reg: + description: + The register of display function block to be set by gce. There are 4 arguments, + such as gce node, subsys id, offset and register size. The subsys id that is + mapping to the register of display function blocks is defined in the gce header + include/dt-bindings/gce/-gce.h of each chips. + $ref: /schemas/types.yaml#/definitions/phandle-array + items: + items: + - description: phandle of GCE + - description: GCE subsys id + - description: register offset + - description: register size + maxItems: 1 + + clocks: + maxItems: 1 + +required: + - compatible + - reg + - mediatek,gce-client-reg + - clocks + +additionalProperties: false + +examples: + - | + #include + #include + + display@14003000 { + compatible = "mediatek,mt8195-mdp3-stitch"; + reg = <0x14003000 0x1000>; + mediatek,gce-client-reg = <&gce1 SUBSYS_1400XXXX 0x3000 0x1000>; + clocks = <&vppsys0 CLK_VPP0_STITCH>; + }; -- 2.18.0