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From: Patrick Williams <patrick@stwcx.xyz>
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Subject: Re: [PATCH v8] ARM: dts: aspeed: Adding Facebook Bletchley BMC
Date: Wed, 20 Dec 2023 06:38:59 -0600
Message-Id: <F444BFCC-1D44-4AF6-A0E1-B153A217FFE3@stwcx.xyz>
References: <20231220080733.GA30641@wunner.de>
Cc: Howard Chiu <howard10703049@gmail.com>, robh+dt@kernel.org,
 joel@jms.id.au, andrew@aj.id.au, devicetree@vger.kernel.org,
 linux-arm-kernel@lists.infradead.org, linux-aspeed@lists.ozlabs.org,
 linux-kernel@vger.kernel.org, potin.lai@quantatw.com,
 Howard Chiu <howard.chiu@quantatw.com>
In-Reply-To: <20231220080733.GA30641@wunner.de>
To: Lukas Wunner <lukas@wunner.de>


---
Patrick Williams

> On Dec 20, 2023, at 2:07=E2=80=AFAM, Lukas Wunner <lukas@wunner.de> wrote:=

>=20
> =EF=BB=BFOn Tue, Dec 07, 2021 at 05:49:24PM +0800, Howard Chiu wrote:
>> Initial introduction of Facebook Bletchley equipped with
>> Aspeed 2600 BMC SoC.
> [...]
>> +        tpmdev@0 {
>> +            compatible =3D "tcg,tpm_tis-spi";
>=20
> What's the chip used on this board?  Going forward, the DT schema for TPMs=

> requires the exact chip name in addition to the generic "tcg,tpm_tis-spi".=


Why is this a requirement?  This assumes there is exactly one chip. TPMs are=
 often placed on a pluggable module in which multiple vendors could be used.=
 There is no way in the DTS to specify multiple compatible chips.=20

>> +            spi-max-frequency =3D <33000000>;
>> +            reg =3D <0>;
>> +        };
>> +    };