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Wed, 20 Dec 2023 05:43:52 -0800 From: Emil Renner Berthing In-Reply-To: <20231220004638.2463643-2-cristian.ciocaltea@collabora.com> References: <20231220004638.2463643-1-cristian.ciocaltea@collabora.com> <20231220004638.2463643-2-cristian.ciocaltea@collabora.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 Date: Wed, 20 Dec 2023 05:43:52 -0800 Message-ID: Subject: Re: [PATCH v5 1/4] riscv: dts: starfive: jh7100: Add sysmain and gmac DT nodes To: Cristian Ciocaltea , Emil Renner Berthing , Conor Dooley , Rob Herring , Krzysztof Kozlowski , Paul Walmsley , Palmer Dabbelt , Albert Ou , Richard Cochran , Andrew Lunn , Jacob Keller Cc: linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, netdev@vger.kernel.org, kernel@collabora.com, Emil Renner Berthing Content-Type: text/plain; charset="UTF-8" Cristian Ciocaltea wrote: > Provide the sysmain and gmac DT nodes supporting the DWMAC found on the > StarFive JH7100 SoC. > > Co-developed-by: Emil Renner Berthing > Signed-off-by: Emil Renner Berthing > Signed-off-by: Cristian Ciocaltea > Reviewed-by: Jacob Keller > --- > arch/riscv/boot/dts/starfive/jh7100.dtsi | 36 ++++++++++++++++++++++++ > 1 file changed, 36 insertions(+) > > diff --git a/arch/riscv/boot/dts/starfive/jh7100.dtsi b/arch/riscv/boot/dts/starfive/jh7100.dtsi > index c216aaecac53..2ebdebe6a81c 100644 > --- a/arch/riscv/boot/dts/starfive/jh7100.dtsi > +++ b/arch/riscv/boot/dts/starfive/jh7100.dtsi > @@ -204,6 +204,37 @@ sdio1: mmc@10010000 { > status = "disabled"; > }; > > + gmac: ethernet@10020000 { > + compatible = "starfive,jh7100-dwmac", "snps,dwmac"; > + reg = <0x0 0x10020000 0x0 0x10000>; > + clocks = <&clkgen JH7100_CLK_GMAC_ROOT_DIV>, > + <&clkgen JH7100_CLK_GMAC_AHB>, > + <&clkgen JH7100_CLK_GMAC_PTP_REF>, > + <&clkgen JH7100_CLK_GMAC_TX_INV>, > + <&clkgen JH7100_CLK_GMAC_GTX>; > + clock-names = "stmmaceth", "pclk", "ptp_ref", "tx", "gtx"; > + resets = <&rstgen JH7100_RSTN_GMAC_AHB>; > + reset-names = "ahb"; > + interrupts = <6>, <7>; > + interrupt-names = "macirq", "eth_wake_irq"; > + max-frame-size = <9000>; > + snps,multicast-filter-bins = <32>; > + snps,perfect-filter-entries = <128>; > + starfive,syscon = <&sysmain 0x70 0>; > + rx-fifo-depth = <32768>; > + tx-fifo-depth = <16384>; > + snps,axi-config = <&stmmac_axi_setup>; > + snps,fixed-burst; > + snps,force_thresh_dma_mode; Compared to v4 you're missing a snps,no-pbl-x8; here. It might be the right thing to do, but then I would have expected it to me mentioned in the cover letter version history. > + status = "disabled"; > + > + stmmac_axi_setup: stmmac-axi-config { > + snps,wr_osr_lmt = <16>; > + snps,rd_osr_lmt = <16>; > + snps,blen = <256 128 64 32 0 0 0>; > + }; > + }; > + > clkgen: clock-controller@11800000 { > compatible = "starfive,jh7100-clkgen"; > reg = <0x0 0x11800000 0x0 0x10000>; > @@ -218,6 +249,11 @@ rstgen: reset-controller@11840000 { > #reset-cells = <1>; > }; > > + sysmain: syscon@11850000 { > + compatible = "starfive,jh7100-sysmain", "syscon"; > + reg = <0x0 0x11850000 0x0 0x10000>; > + }; > + > i2c0: i2c@118b0000 { > compatible = "snps,designware-i2c"; > reg = <0x0 0x118b0000 0x0 0x10000>; > -- > 2.43.0 >