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charset="UTF-8" Content-Transfer-Encoding: quoted-printable User-Agent: Evolution 3.50.2 (3.50.2-1.fc39) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Le mercredi 20 d=C3=A9cembre 2023 =C3=A0 09:46 +0100, Hugues Fruchet a =C3= =A9crit=C2=A0: > Add support for STM32MP25 VDEC video hardware decoder. > H264/VP8 decoding up to 4080x4080. > No post-processor support. > VDEC has its own reset/clock/irq. >=20 > Signed-off-by: Hugues Fruchet Reviewed-by: Nicolas Dufresne > --- > drivers/media/platform/verisilicon/Kconfig | 14 ++- > drivers/media/platform/verisilicon/Makefile | 3 + > .../media/platform/verisilicon/hantro_drv.c | 3 + > .../media/platform/verisilicon/hantro_hw.h | 1 + > .../platform/verisilicon/stm32mp25_vdec_hw.c | 92 +++++++++++++++++++ > 5 files changed, 110 insertions(+), 3 deletions(-) > create mode 100644 drivers/media/platform/verisilicon/stm32mp25_vdec_hw.= c >=20 > diff --git a/drivers/media/platform/verisilicon/Kconfig b/drivers/media/p= latform/verisilicon/Kconfig > index e65b836b9d78..7642ff9cf96c 100644 > --- a/drivers/media/platform/verisilicon/Kconfig > +++ b/drivers/media/platform/verisilicon/Kconfig > @@ -4,7 +4,7 @@ comment "Verisilicon media platform drivers" > =20 > config VIDEO_HANTRO > tristate "Hantro VPU driver" > - depends on ARCH_MXC || ARCH_ROCKCHIP || ARCH_AT91 || ARCH_SUNXI || COMP= ILE_TEST > + depends on ARCH_MXC || ARCH_ROCKCHIP || ARCH_AT91 || ARCH_SUNXI || ARCH= _STM32 || COMPILE_TEST > depends on V4L_MEM2MEM_DRIVERS > depends on VIDEO_DEV > select MEDIA_CONTROLLER > @@ -16,8 +16,8 @@ config VIDEO_HANTRO > select V4L2_VP9 > help > Support for the Hantro IP based Video Processing Units present on > - Rockchip and NXP i.MX8M SoCs, which accelerate video and image > - encoding and decoding. > + Rockchip, NXP i.MX8M and STM32MP25 SoCs, which accelerate video > + and image encoding and decoding. > To compile this driver as a module, choose M here: the module > will be called hantro-vpu. > =20 > @@ -52,3 +52,11 @@ config VIDEO_HANTRO_SUNXI > default y > help > Enable support for H6 SoC. > + > +config VIDEO_HANTRO_STM32MP25 > + bool "Hantro STM32MP25 support" > + depends on VIDEO_HANTRO > + depends on ARCH_STM32 || COMPILE_TEST > + default y > + help > + Enable support for STM32MP25 SoCs. > diff --git a/drivers/media/platform/verisilicon/Makefile b/drivers/media/= platform/verisilicon/Makefile > index 6ad2ef885920..5854e0f0dd32 100644 > --- a/drivers/media/platform/verisilicon/Makefile > +++ b/drivers/media/platform/verisilicon/Makefile > @@ -39,3 +39,6 @@ hantro-vpu-$(CONFIG_VIDEO_HANTRO_ROCKCHIP) +=3D \ > =20 > hantro-vpu-$(CONFIG_VIDEO_HANTRO_SUNXI) +=3D \ > sunxi_vpu_hw.o > + > +hantro-vpu-$(CONFIG_VIDEO_HANTRO_STM32MP25) +=3D \ > + stm32mp25_vdec_hw.o > diff --git a/drivers/media/platform/verisilicon/hantro_drv.c b/drivers/me= dia/platform/verisilicon/hantro_drv.c > index a9fa05ac56a9..2db27c333924 100644 > --- a/drivers/media/platform/verisilicon/hantro_drv.c > +++ b/drivers/media/platform/verisilicon/hantro_drv.c > @@ -733,6 +733,9 @@ static const struct of_device_id of_hantro_match[] = =3D { > #endif > #ifdef CONFIG_VIDEO_HANTRO_SUNXI > { .compatible =3D "allwinner,sun50i-h6-vpu-g2", .data =3D &sunxi_vpu_va= riant, }, > +#endif > +#ifdef CONFIG_VIDEO_HANTRO_STM32MP25 > + { .compatible =3D "st,stm32mp25-vdec", .data =3D &stm32mp25_vdec_varian= t, }, > #endif > { /* sentinel */ } > }; > diff --git a/drivers/media/platform/verisilicon/hantro_hw.h b/drivers/med= ia/platform/verisilicon/hantro_hw.h > index 7f33f7b07ce4..b7eccc1a96fc 100644 > --- a/drivers/media/platform/verisilicon/hantro_hw.h > +++ b/drivers/media/platform/verisilicon/hantro_hw.h > @@ -406,6 +406,7 @@ extern const struct hantro_variant rk3568_vpu_variant= ; > extern const struct hantro_variant rk3588_vpu981_variant; > extern const struct hantro_variant sama5d4_vdec_variant; > extern const struct hantro_variant sunxi_vpu_variant; > +extern const struct hantro_variant stm32mp25_vdec_variant; > =20 > extern const struct hantro_postproc_ops hantro_g1_postproc_ops; > extern const struct hantro_postproc_ops hantro_g2_postproc_ops; > diff --git a/drivers/media/platform/verisilicon/stm32mp25_vdec_hw.c b/dri= vers/media/platform/verisilicon/stm32mp25_vdec_hw.c > new file mode 100644 > index 000000000000..aa8b0f751390 > --- /dev/null > +++ b/drivers/media/platform/verisilicon/stm32mp25_vdec_hw.c > @@ -0,0 +1,92 @@ > +// SPDX-License-Identifier: GPL-2.0 > +/* > + * STM32MP25 VDEC video decoder driver > + * > + * Copyright (C) STMicroelectronics SA 2022 > + * Authors: Hugues Fruchet > + * for STMicroelectronics. > + * > + */ > + > +#include "hantro.h" > + > +/* > + * Supported formats. > + */ > + > +static const struct hantro_fmt stm32mp25_vdec_fmts[] =3D { > + { > + .fourcc =3D V4L2_PIX_FMT_NV12, > + .codec_mode =3D HANTRO_MODE_NONE, > + .frmsize =3D { > + .min_width =3D FMT_MIN_WIDTH, > + .max_width =3D FMT_FHD_WIDTH, > + .step_width =3D MB_DIM, > + .min_height =3D FMT_MIN_HEIGHT, > + .max_height =3D FMT_FHD_HEIGHT, > + .step_height =3D MB_DIM, > + }, > + }, > + { > + .fourcc =3D V4L2_PIX_FMT_VP8_FRAME, > + .codec_mode =3D HANTRO_MODE_VP8_DEC, > + .max_depth =3D 2, > + .frmsize =3D { > + .min_width =3D FMT_MIN_WIDTH, > + .max_width =3D FMT_FHD_WIDTH, > + .step_width =3D MB_DIM, > + .min_height =3D FMT_MIN_HEIGHT, > + .max_height =3D FMT_FHD_HEIGHT, > + .step_height =3D MB_DIM, > + }, > + }, > + { > + .fourcc =3D V4L2_PIX_FMT_H264_SLICE, > + .codec_mode =3D HANTRO_MODE_H264_DEC, > + .max_depth =3D 2, > + .frmsize =3D { > + .min_width =3D FMT_MIN_WIDTH, > + .max_width =3D FMT_FHD_WIDTH, > + .step_width =3D MB_DIM, > + .min_height =3D FMT_MIN_HEIGHT, > + .max_height =3D FMT_FHD_HEIGHT, > + .step_height =3D MB_DIM, > + }, > + }, > +}; > + > +/* > + * Supported codec ops. > + */ > + > +static const struct hantro_codec_ops stm32mp25_vdec_codec_ops[] =3D { > + [HANTRO_MODE_VP8_DEC] =3D { > + .run =3D hantro_g1_vp8_dec_run, > + .reset =3D hantro_g1_reset, > + .init =3D hantro_vp8_dec_init, > + .exit =3D hantro_vp8_dec_exit, > + }, > + [HANTRO_MODE_H264_DEC] =3D { > + .run =3D hantro_g1_h264_dec_run, > + .reset =3D hantro_g1_reset, > + .init =3D hantro_h264_dec_init, > + .exit =3D hantro_h264_dec_exit, > + }, > +}; > + > +static const struct hantro_irq stm32mp25_irqs[] =3D { > + { "vdec", hantro_g1_irq }, > +}; > + > +static const char * const stm32mp25_clk_names[] =3D { "vdec-clk" }; > + > +const struct hantro_variant stm32mp25_vdec_variant =3D { > + .dec_fmts =3D stm32mp25_vdec_fmts, > + .num_dec_fmts =3D ARRAY_SIZE(stm32mp25_vdec_fmts), > + .codec =3D HANTRO_VP8_DECODER | HANTRO_H264_DECODER, > + .codec_ops =3D stm32mp25_vdec_codec_ops, > + .irqs =3D stm32mp25_irqs, > + .num_irqs =3D ARRAY_SIZE(stm32mp25_irqs), > + .clk_names =3D stm32mp25_clk_names, > + .num_clocks =3D ARRAY_SIZE(stm32mp25_clk_names), > +};