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Message-ID: <ca865271efc66cf51989d4d7d775ec4c59ce97d3.camel@collabora.com>
Subject: Re: [PATCH v3 3/5] media: hantro: add support for STM32MP25 VENC
From: Nicolas Dufresne <nicolas.dufresne@collabora.com>
To: Hugues Fruchet <hugues.fruchet@foss.st.com>, Ezequiel Garcia
 <ezequiel@vanguardiasur.com.ar>, Philipp Zabel <p.zabel@pengutronix.de>, 
 Andrzej Pietrasiewicz <andrzej.p@collabora.com>, Sakari Ailus
 <sakari.ailus@linux.intel.com>, Benjamin Gaignard
 <benjamin.gaignard@collabora.com>, Laurent Pinchart
 <laurent.pinchart+renesas@ideasonboard.com>, Daniel Almeida
 <daniel.almeida@collabora.com>, Benjamin Mugnier
 <benjamin.mugnier@foss.st.com>,  Heiko Stuebner <heiko@sntech.de>, Mauro
 Carvalho Chehab <mchehab@kernel.org>, Hans Verkuil <hverkuil@xs4all.nl>,
 linux-media@vger.kernel.org, Maxime Coquelin <mcoquelin.stm32@gmail.com>,
 Alexandre Torgue <alexandre.torgue@foss.st.com>, 
 linux-stm32@st-md-mailman.stormreply.com, Rob Herring <robh+dt@kernel.org>,
  Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Conor Dooley
 <conor+dt@kernel.org>, devicetree@vger.kernel.org, 
 linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, 
 linux-rockchip@lists.infradead.org
Cc: Marco Felsch <m.felsch@pengutronix.de>, Adam Ford <aford173@gmail.com>
Date: Wed, 20 Dec 2023 08:53:26 -0500
In-Reply-To: <20231220084641.2076428-4-hugues.fruchet@foss.st.com>
References: <20231220084641.2076428-1-hugues.fruchet@foss.st.com>
	 <20231220084641.2076428-4-hugues.fruchet@foss.st.com>
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Hi,

Le mercredi 20 d=C3=A9cembre 2023 =C3=A0 09:46 +0100, Hugues Fruchet a =C3=
=A9crit=C2=A0:
> Add support for STM32MP25 VENC video hardware encoder.
> JPEG encoding up to 8176x8176.
> VENC has its own reset/clock/irq.
>=20
> Signed-off-by: Hugues Fruchet <hugues.fruchet@foss.st.com>
> ---
>  drivers/media/platform/verisilicon/Makefile   |   3 +-
>  .../media/platform/verisilicon/hantro_drv.c   |   1 +
>  .../media/platform/verisilicon/hantro_hw.h    |   1 +
>  .../platform/verisilicon/stm32mp25_venc_hw.c  | 147 ++++++++++++++++++
>  4 files changed, 151 insertions(+), 1 deletion(-)
>  create mode 100644 drivers/media/platform/verisilicon/stm32mp25_venc_hw.=
c
>=20
> diff --git a/drivers/media/platform/verisilicon/Makefile b/drivers/media/=
platform/verisilicon/Makefile
> index 5854e0f0dd32..3bf43fdbedc1 100644
> --- a/drivers/media/platform/verisilicon/Makefile
> +++ b/drivers/media/platform/verisilicon/Makefile
> @@ -41,4 +41,5 @@ hantro-vpu-$(CONFIG_VIDEO_HANTRO_SUNXI) +=3D \
>  		sunxi_vpu_hw.o
> =20
>  hantro-vpu-$(CONFIG_VIDEO_HANTRO_STM32MP25) +=3D \
> -		stm32mp25_vdec_hw.o
> +		stm32mp25_vdec_hw.o \
> +		stm32mp25_venc_hw.o
> diff --git a/drivers/media/platform/verisilicon/hantro_drv.c b/drivers/me=
dia/platform/verisilicon/hantro_drv.c
> index 2db27c333924..4d97a8ac03de 100644
> --- a/drivers/media/platform/verisilicon/hantro_drv.c
> +++ b/drivers/media/platform/verisilicon/hantro_drv.c
> @@ -736,6 +736,7 @@ static const struct of_device_id of_hantro_match[] =
=3D {
>  #endif
>  #ifdef CONFIG_VIDEO_HANTRO_STM32MP25
>  	{ .compatible =3D "st,stm32mp25-vdec", .data =3D &stm32mp25_vdec_varian=
t, },
> +	{ .compatible =3D "st,stm32mp25-venc", .data =3D &stm32mp25_venc_varian=
t, },
>  #endif
>  	{ /* sentinel */ }
>  };
> diff --git a/drivers/media/platform/verisilicon/hantro_hw.h b/drivers/med=
ia/platform/verisilicon/hantro_hw.h
> index b7eccc1a96fc..70c72e9d11d5 100644
> --- a/drivers/media/platform/verisilicon/hantro_hw.h
> +++ b/drivers/media/platform/verisilicon/hantro_hw.h
> @@ -407,6 +407,7 @@ extern const struct hantro_variant rk3588_vpu981_vari=
ant;
>  extern const struct hantro_variant sama5d4_vdec_variant;
>  extern const struct hantro_variant sunxi_vpu_variant;
>  extern const struct hantro_variant stm32mp25_vdec_variant;
> +extern const struct hantro_variant stm32mp25_venc_variant;
> =20
>  extern const struct hantro_postproc_ops hantro_g1_postproc_ops;
>  extern const struct hantro_postproc_ops hantro_g2_postproc_ops;
> diff --git a/drivers/media/platform/verisilicon/stm32mp25_venc_hw.c b/dri=
vers/media/platform/verisilicon/stm32mp25_venc_hw.c
> new file mode 100644
> index 000000000000..9d220ff5f1a9
> --- /dev/null
> +++ b/drivers/media/platform/verisilicon/stm32mp25_venc_hw.c
> @@ -0,0 +1,147 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * STM32MP25 VENC video encoder driver
> + *
> + * Copyright (C) STMicroelectronics SA 2022
> + * Authors: Hugues Fruchet <hugues.fruchet@foss.st.com>
> + *          for STMicroelectronics.
> + *
> + */
> +
> +#include <linux/clk.h>
> +#include <linux/delay.h>
> +#include <linux/reset.h>
> +
> +#include "hantro.h"
> +#include "hantro_jpeg.h"
> +#include "hantro_h1_regs.h"
> +
> +/*
> + * Supported formats.
> + */
> +
> +static const struct hantro_fmt stm32mp25_venc_fmts[] =3D {
> +	{
> +		.fourcc =3D V4L2_PIX_FMT_YUV420M,
> +		.codec_mode =3D HANTRO_MODE_NONE,
> +		.enc_fmt =3D ROCKCHIP_VPU_ENC_FMT_YUV420P,
> +		.frmsize =3D {
> +			.min_width =3D 96,
> +			.max_width =3D FMT_4K_WIDTH,
> +			.step_width =3D MB_DIM,
> +			.min_height =3D 96,
> +			.max_height =3D FMT_4K_HEIGHT,
> +			.step_height =3D MB_DIM,
> +		},
> +	},
> +	{
> +		.fourcc =3D V4L2_PIX_FMT_NV12M,
> +		.codec_mode =3D HANTRO_MODE_NONE,
> +		.enc_fmt =3D ROCKCHIP_VPU_ENC_FMT_YUV420SP,
> +		.frmsize =3D {
> +			.min_width =3D 96,
> +			.max_width =3D FMT_4K_WIDTH,
> +			.step_width =3D MB_DIM,
> +			.min_height =3D 96,
> +			.max_height =3D FMT_4K_HEIGHT,
> +			.step_height =3D MB_DIM,
> +		},
> +	},
> +	{
> +		.fourcc =3D V4L2_PIX_FMT_YUYV,
> +		.codec_mode =3D HANTRO_MODE_NONE,
> +		.enc_fmt =3D ROCKCHIP_VPU_ENC_FMT_YUYV422,
> +		.frmsize =3D {
> +			.min_width =3D 96,
> +			.max_width =3D FMT_4K_WIDTH,
> +			.step_width =3D MB_DIM,
> +			.min_height =3D 96,
> +			.max_height =3D FMT_4K_HEIGHT,
> +			.step_height =3D MB_DIM,
> +		},
> +	},
> +	{
> +		.fourcc =3D V4L2_PIX_FMT_UYVY,
> +		.codec_mode =3D HANTRO_MODE_NONE,
> +		.enc_fmt =3D ROCKCHIP_VPU_ENC_FMT_UYVY422,
> +		.frmsize =3D {
> +			.min_width =3D 96,
> +			.max_width =3D FMT_4K_WIDTH,
> +			.step_width =3D MB_DIM,
> +			.min_height =3D 96,
> +			.max_height =3D FMT_4K_HEIGHT,
> +			.step_height =3D MB_DIM,
> +		},

For all the RAW formats, min/max/step isn't being used at the moment, so be=
st to
drop it.

> +	},
> +	{
> +		.fourcc =3D V4L2_PIX_FMT_JPEG,
> +		.codec_mode =3D HANTRO_MODE_JPEG_ENC,
> +		.max_depth =3D 2,
> +		.header_size =3D JPEG_HEADER_SIZE,
> +		.frmsize =3D {
> +			.min_width =3D 96,
> +			.max_width =3D FMT_4K_WIDTH,

This should be 8176 according to your commit message. Though, according to =
the
Rockchip integration, this is more likely 8192. I'd suggest to add a define=
 and
share it if that is correct.

> +			.step_width =3D MB_DIM,
> +			.min_height =3D 96,
> +			.max_height =3D FMT_4K_HEIGHT,
> +			.step_height =3D MB_DIM,
> +		},
> +	},
> +};
> +
> +static irqreturn_t stm32mp25_venc_irq(int irq, void *dev_id)
> +{
> +	struct hantro_dev *vpu =3D dev_id;
> +	enum vb2_buffer_state state;
> +	u32 status;
> +
> +	status =3D vepu_read(vpu, H1_REG_INTERRUPT);
> +	state =3D (status & H1_REG_INTERRUPT_FRAME_RDY) ?
> +		VB2_BUF_STATE_DONE : VB2_BUF_STATE_ERROR;
> +
> +	vepu_write(vpu, H1_REG_INTERRUPT_BIT, H1_REG_INTERRUPT);
> +
> +	hantro_irq_done(vpu, state);
> +
> +	return IRQ_HANDLED;
> +}
> +
> +static void stm32mp25_venc_reset(struct hantro_ctx *ctx)
> +{
> +}
> +
> +/*
> + * Supported codec ops.
> + */
> +
> +static const struct hantro_codec_ops stm32mp25_venc_codec_ops[] =3D {
> +	[HANTRO_MODE_JPEG_ENC] =3D {
> +		.run =3D hantro_h1_jpeg_enc_run,
> +		.reset =3D stm32mp25_venc_reset,
> +		.done =3D hantro_h1_jpeg_enc_done,
> +	},
> +};
> +
> +/*
> + * Variants.
> + */
> +
> +static const struct hantro_irq stm32mp25_venc_irqs[] =3D {
> +	{ "venc", stm32mp25_venc_irq },
> +};
> +
> +static const char * const stm32mp25_venc_clk_names[] =3D {
> +	"venc-clk"
> +};
> +
> +const struct hantro_variant stm32mp25_venc_variant =3D {
> +	.enc_fmts =3D stm32mp25_venc_fmts,
> +	.num_enc_fmts =3D ARRAY_SIZE(stm32mp25_venc_fmts),
> +	.codec =3D HANTRO_JPEG_ENCODER,
> +	.codec_ops =3D stm32mp25_venc_codec_ops,
> +	.irqs =3D stm32mp25_venc_irqs,
> +	.num_irqs =3D ARRAY_SIZE(stm32mp25_venc_irqs),
> +	.clk_names =3D stm32mp25_venc_clk_names,
> +	.num_clocks =3D ARRAY_SIZE(stm32mp25_venc_clk_names)
> +};
> +