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[82.149.12.148]) by smtp.gmail.com with ESMTPSA id l2-20020a05600c4f0200b003feae747ff2sm7858073wmq.35.2023.12.20.07.25.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 20 Dec 2023 07:25:53 -0800 (PST) From: Jernej =?utf-8?B?xaBrcmFiZWM=?= To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Paul Walmsley , Palmer Dabbelt , Albert Ou , Chen-Yu Tsai , Samuel Holland , Yangtao Li , "Rafael J . Wysocki" , Viresh Kumar , Brandon Cheo Fusi Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, Brandon Cheo Fusi Subject: Re: [RFC PATCH 2/2] riscv: dts: allwinner: Fill in OPPs Date: Wed, 20 Dec 2023 16:25:50 +0100 Message-ID: <113541315.nniJfEyVGO@jernej-laptop> In-Reply-To: <20231220095141.27883-3-fusibrandon13@gmail.com> References: <20231220095141.27883-1-fusibrandon13@gmail.com> <20231220095141.27883-3-fusibrandon13@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="us-ascii" Dne sreda, 20. december 2023 ob 10:51:41 CET je Brandon Cheo Fusi napisal(a): > Specifies two voltage ranges, in order of increasing stability, > for each OPP. This is heavily inspired by > > https://github.com/Tina-Linux/linux-5.4/blob/master/arch/riscv/boot/dts/sunxi/sun20iw1p1.dtsi#L118-L133 > > and > > https://github.com/mangopi-sbc/tina-linux-5.4/blob/0d4903ebd9d2194ad914686d5b0fc1ddacf11a9d/arch/riscv/boot/dts/sunxi/sun20iw1p1.dtsi#L118-L182 Remove links from message. If you really want them, add Link tag for each. > > Signed-off-by: Brandon Cheo Fusi > --- > arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi | 8 ++++++-- > 1 file changed, 6 insertions(+), 2 deletions(-) > > diff --git a/arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi b/arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi > index 2f1771c19..8e7bc8bd0 100644 > --- a/arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi > +++ b/arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi > @@ -48,13 +48,17 @@ opp_table_cpu: opp-table-cpu { > opp-408000000 { > clock-latency-ns = <244144>; /* 8 32k periods */ > opp-hz = /bits/ 64 <408000000>; > - opp-microvolt-speed0 = <900000 900000 1100000>; > + > + opp-microvolt-speed0 = <950000 900000 1100000>; Second value should be same as first, otherwise you'll experience stability issue. > + opp-microvolt-speed1 = <900000 900000 1100000>; > }; > > opp-1080000000 { > clock-latency-ns = <244144>; /* 8 32k periods */ > opp-hz = /bits/ 64 <1008000000>; > - opp-microvolt-speed0 = <900000 900000 1100000>; > + > + opp-microvolt-speed0 = <1100000 900000 1100000>; Ditto. Best regards, Jernej > + opp-microvolt-speed1 = <950000 900000 1100000>; > }; > }; > >