Received-SPF: pass (google.com: domain of linux-kernel+bounces-8324-linux.lists.archive=gmail.com@vger.kernel.org designates 2604:1380:45e3:2400::1 as permitted sender) client-ip=2604:1380:45e3:2400::1;
Message-ID: <4027f264-c7e9-4b7d-b88b-ced20e431314@kernel.org>
Date: Thu, 21 Dec 2023 14:21:39 +0200
Precedence: bulk
MIME-Version: 1.0
User-Agent: Mozilla Thunderbird
Subject: Re: [RFC PATCH net-next] net: ethernet: ti: am65-cpsw-nuss: Enable
 SGMII mode for J784S4 CPSW9G
To: Chintan Vankar <c-vankar@ti.com>, Dan Carpenter
 <dan.carpenter@linaro.org>, Grygorii Strashko <grygorii.strashko@ti.com>,
 Siddharth Vadapalli <s-vadapalli@ti.com>, Paolo Abeni <pabeni@redhat.com>,
 Jakub Kicinski <kuba@kernel.org>, Eric Dumazet <edumazet@google.com>,
 "David S. Miller" <davem@davemloft.net>
Cc: linux-kernel@vger.kernel.org, netdev@vger.kernel.org
References: <20231221111046.761843-1-c-vankar@ti.com>
Content-Language: en-US
From: Roger Quadros <rogerq@kernel.org>
In-Reply-To: <20231221111046.761843-1-c-vankar@ti.com>
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 7bit


On 21/12/2023 13:10, Chintan Vankar wrote:
> TI's J784S4 SoC supports SGMII mode with CPSW9G instance of the CPSW
> Ethernet Switch. Thus, enable it by adding SGMII mode to the
> extra_modes member of the "j784s4_cpswxg_pdata" SoC data.
> 
> Signed-off-by: Chintan Vankar <c-vankar@ti.com>

Reviewed-by: Roger Quadros <rogerq@kernel.org>

Please send without RFC in subject.

> ---
>  drivers/net/ethernet/ti/am65-cpsw-nuss.c | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/net/ethernet/ti/am65-cpsw-nuss.c b/drivers/net/ethernet/ti/am65-cpsw-nuss.c
> index 7651f90f51f2..9aa5a6108521 100644
> --- a/drivers/net/ethernet/ti/am65-cpsw-nuss.c
> +++ b/drivers/net/ethernet/ti/am65-cpsw-nuss.c
> @@ -2855,7 +2855,8 @@ static const struct am65_cpsw_pdata j784s4_cpswxg_pdata = {
>  	.quirks = 0,
>  	.ale_dev_id = "am64-cpswxg",
>  	.fdqring_mode = K3_RINGACC_RING_MODE_MESSAGE,
> -	.extra_modes = BIT(PHY_INTERFACE_MODE_QSGMII) | BIT(PHY_INTERFACE_MODE_USXGMII),
> +	.extra_modes = BIT(PHY_INTERFACE_MODE_QSGMII) | BIT(PHY_INTERFACE_MODE_SGMII) |
> +		       BIT(PHY_INTERFACE_MODE_USXGMII),
>  };
>  
>  static const struct of_device_id am65_cpsw_nuss_of_mtable[] = {

-- 
cheers,
-roger