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[139.178.88.99]) by mx.google.com with ESMTPS id m3-20020a633f03000000b005c6650f66bbsi1839760pga.416.2023.12.21.08.49.51 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 21 Dec 2023 08:49:51 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel+bounces-8789-linux.lists.archive=gmail.com@vger.kernel.org designates 139.178.88.99 as permitted sender) client-ip=139.178.88.99; Authentication-Results: mx.google.com; dkim=pass header.i=@dh-electronics.com header.s=dhelectronicscom header.b=uWToZ210; spf=pass (google.com: domain of linux-kernel+bounces-8789-linux.lists.archive=gmail.com@vger.kernel.org designates 139.178.88.99 as permitted sender) smtp.mailfrom="linux-kernel+bounces-8789-linux.lists.archive=gmail.com@vger.kernel.org"; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=dh-electronics.com Received: from smtp.subspace.kernel.org (wormhole.subspace.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by sv.mirrors.kernel.org (Postfix) with ESMTPS id E9E1C2844A1 for ; Thu, 21 Dec 2023 16:49:13 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id A8A515821C; Thu, 21 Dec 2023 16:48:57 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=dh-electronics.com header.i=@dh-electronics.com header.b="uWToZ210" X-Original-To: linux-kernel@vger.kernel.org Received: from mx4.securetransport.de (mx4.securetransport.de [178.254.6.145]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 61B6D59913; Thu, 21 Dec 2023 16:48:53 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=dh-electronics.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=dh-electronics.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=dh-electronics.com; s=dhelectronicscom; t=1703177282; bh=OUBsafXMgbKKwKeKHW98AeHHiie/LjHIzcQ1dOpPqmk=; h=From:To:CC:Subject:Date:From; b=uWToZ210+ervwTOs4Ip2PpJgyPW1ATQ/lckRtuORI2LreWnWqz5y8blQhBQjyhJYo ru+ycX+P+48pwDQKGknznVNcHTnAV/74kYhXciLhaRZH/9ooD8P4T9I7JQ81fTKslo Rc5EbEAwZCKd6tVjyGYHoWF3RkLeWt7wm/+I34ew0aP5HUy57++xj1C996/na0PnUg 6z+3DGjD3DkxJPsmxYTJNU8K8fonIBu4Z1vt2qtrOjqXNMnGsApzqXG781h09afQvm hpDF9m3z4LN9CNTh7+TnxiTwCIgyO2vUFpH3c1gZHodttpgb5TjvfLn9kjCxcIcfb9 EoZU6V7q1o4qg== From: Christoph Niedermaier To: CC: Christoph Niedermaier , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Shawn Guo , Marek Vasut , Fabio Estevam , NXP Linux Team , , , Subject: [PATCH] ARM: dts: imx6ull-dhcor: Remove 900MHz operating point Date: Thu, 21 Dec 2023 17:46:33 +0100 Message-ID: <20231221164633.2029-1-cniedermaier@dh-electronics.com> X-klartext: yes Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain Due to CPU lifetime consideration of the SoC manufacturer [1] and the preferred area of operation in the industrial related environment, set the maximum frequency for each DHCOM i.MX6ULL to 792MHz, as with the industrial type. This is done by removing the operating point at 900MHz and set the clock-frequency to 792000000. [1] https://www.nxp.com/docs/en/application-note/AN5337.pdf Signed-off-by: Christoph Niedermaier --- Cc: Rob Herring Cc: Krzysztof Kozlowski Cc: Conor Dooley Cc: Shawn Guo Cc: Marek Vasut Cc: Fabio Estevam Cc: NXP Linux Team Cc: kernel@dh-electronics.com Cc: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org To: linux-arm-kernel@lists.infradead.org --- arch/arm/boot/dts/nxp/imx/imx6ull-dhcor-som.dtsi | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/nxp/imx/imx6ull-dhcor-som.dtsi b/arch/arm/boot/dts/nxp/imx/imx6ull-dhcor-som.dtsi index 45315adfaa86..75486e1b0c15 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6ull-dhcor-som.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6ull-dhcor-som.dtsi @@ -28,10 +28,14 @@ /* * Due to the design as a solderable SOM, there are no capacitors * below the SoC, therefore higher voltages are required. + * Due to CPU lifetime consideration of the SoC manufacturer and + * the preferred area of operation in the industrial related + * environment, set the maximum frequency for each DHCOM i.MX6ULL + * to 792MHz, as with the industrial type. */ + clock-frequency = <792000000>; operating-points = < /* kHz uV */ - 900000 1275000 792000 1250000 /* Voltage increased */ 528000 1175000 396000 1025000 @@ -39,7 +43,6 @@ >; fsl,soc-operating-points = < /* KHz uV */ - 900000 1250000 792000 1250000 /* Voltage increased */ 528000 1175000 396000 1175000 -- 2.11.0