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Message-ID: <849d0ea9-d4f7-c568-968c-88835f64fadf@quicinc.com>
Date: Fri, 22 Dec 2023 11:29:01 +0530
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Subject: Re: [PATCH v2 1/2] usb: dwc3: host: Set XHCI_SG_TRB_CACHE_SIZE_QUIRK
Content-Language: en-US
To: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
CC: Thinh Nguyen <Thinh.Nguyen@synopsys.com>,
        Mathias Nyman
	<mathias.nyman@intel.com>,
        <linux-kernel@vger.kernel.org>, <linux-usb@vger.kernel.org>,
        <stable@vger.kernel.org>
References: <20231212112521.3774610-1-quic_prashk@quicinc.com>
 <20231212112521.3774610-2-quic_prashk@quicinc.com>
 <2023121518-uncharted-riddance-7c58@gregkh>
From: Prashanth K <quic_prashk@quicinc.com>
In-Reply-To: <2023121518-uncharted-riddance-7c58@gregkh>
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On 15-12-23 06:12 pm, Greg Kroah-Hartman wrote:
> On Tue, Dec 12, 2023 at 04:55:20PM +0530, Prashanth K wrote:
>> Upstream commit bac1ec551434 ("usb: xhci: Set quirk for
>> XHCI_SG_TRB_CACHE_SIZE_QUIRK") introduced a new quirk in XHCI
>> which fixes XHC timeout, which was seen on synopsys XHCs while
>> using SG buffers. But the support for this quirk isn't present
>> in the DWC3 layer.
>>
>> We will encounter this XHCI timeout/hung issue if we run iperf
>> loopback tests using RTL8156 ethernet adaptor on DWC3 targets
>> with scatter-gather enabled. This gets resolved after enabling
>> the XHCI_SG_TRB_CACHE_SIZE_QUIRK. This patch enables it using
>> the xhci device property since its needed for DWC3 controller.
>>
>> In Synopsys DWC3 databook,
>> Table 9-3: xHCI Debug Capability Limitations
>> Chained TRBs greater than TRB cache size: The debug capability
>> driver must not create a multi-TRB TD that describes smaller
>> than a 1K packet that spreads across 8 or more TRBs on either
>> the IN TR or the OUT TR.
>>
>> Cc: <stable@vger.kernel.org>
>> Signed-off-by: Prashanth K <quic_prashk@quicinc.com>
> 
> What commit id does this fix?
>
This doesn't fix any commit as such, but adds the support for 
XHCI_SG_TRB_CACHE_SIZE_QUIRK (which is present in XHCI layer) to DWC3 
layer. I have CC'ed stable kernel for this to be back-ported to older 
kernels (#5.11).

> 
>> ---
>>   drivers/usb/dwc3/host.c | 2 ++
>>   1 file changed, 2 insertions(+)
>>
>> diff --git a/drivers/usb/dwc3/host.c b/drivers/usb/dwc3/host.c
>> index 61f57fe5bb78..31a496233d87 100644
>> --- a/drivers/usb/dwc3/host.c
>> +++ b/drivers/usb/dwc3/host.c
>> @@ -89,6 +89,8 @@ int dwc3_host_init(struct dwc3 *dwc)
>>   
>>   	memset(props, 0, sizeof(struct property_entry) * ARRAY_SIZE(props));
>>   
>> +	props[prop_idx++] = PROPERTY_ENTRY_BOOL("xhci-sg-trb-cache-size-quirk");
> 
> And this is ok if the entry is not present?
> 
We are intending to use this quirk for all the dwc3 based devices since 
the DWC3 XHC needs it. If the entry is not present then we will hit 
stall if certain conditions aren't met (have mentioned the condition in 
commit text).

Thanks,
Prashanth K