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Message-ID: <9d8abd54-b497-467e-b473-13df39c13a76@kernel.org>
Date: Fri, 22 Dec 2023 12:11:37 +0200
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Subject: Re: [PATCH v3 5/5] phy: cadence-torrent: Add USXGMII(156.25MHz) +
 SGMII/QSGMII(100MHz) multilink config for TI J7200
Content-Language: en-US
To: Swapnil Jakhade <sjakhade@cadence.com>, vkoul@kernel.org,
 kishon@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org,
 conor+dt@kernel.org, linux-phy@lists.infradead.org,
 linux-kernel@vger.kernel.org, devicetree@vger.kernel.org
Cc: mparab@cadence.com, s-vadapalli@ti.com
References: <20231221162051.2131202-1-sjakhade@cadence.com>
 <20231221162051.2131202-6-sjakhade@cadence.com>
From: Roger Quadros <rogerq@kernel.org>
In-Reply-To: <20231221162051.2131202-6-sjakhade@cadence.com>
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On 21/12/2023 18:20, Swapnil Jakhade wrote:
> Add a separate compatible and registers map table for TI J7200.
> TI J7200 uses Torrent SD0805 version which is a special version
> derived from Torrent SD0801 with some differences in register
> configurations.
> 
> Add register sequences for USXGMII(156.25MHz) + SGMII/QSGMII(100MHz)
> multilink config for TI J7200. USXGMII uses PLL0 and SGMII/QSGMII
> uses PLL1.
> 
> Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>

Reviewed-by: Roger Quadros <rogerq@kernel.org>

-- 
cheers,
-roger