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Date: Fri, 22 Dec 2023 13:18:21 +0100
From: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
To: Jiaxun Yang <jiaxun.yang@flygoat.com>
Cc: linux-mips@vger.kernel.org, linux-kernel@vger.kernel.org,
	gregory.clement@bootlin.com, vladimir.kondratiev@intel.com
Subject: Re: [PATCH v2 05/10] MIPS: Refactor mips_cps_core_entry
 implementation
Message-ID: <ZYV+jQ5M/Hu2aTgq@alpha.franken.de>
References: <20231027221106.405666-1-jiaxun.yang@flygoat.com>
 <20231027221106.405666-6-jiaxun.yang@flygoat.com>
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On Fri, Oct 27, 2023 at 11:11:01PM +0100, Jiaxun Yang wrote:
> Now the exception vector for CPS systems are allocated on-fly
> with memblock as well.
> 
> It will try to allocate from KSEG1 first, and then try to allocate
> in low 4G if possible.
> 
> The main reset vector is now generated by uasm, to avoid tons
> of patches to the code. Other vectors are copied to the location
> later.

this patch does way to many things in one go. What is needed to
make a kernel working with an ebase anyware in XPHYS ?

Thomas.

-- 
Crap can work. Given enough thrust pigs will fly, but it's not necessarily a
good idea.                                                [ RFC1925, 2.3 ]