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Date: Fri, 22 Dec 2023 15:30:55 +0000
From: Conor Dooley <conor@kernel.org>
To: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Cc: "Manne, Nava kishore" <nava.kishore.manne@amd.com>,
	"mdf@kernel.org" <mdf@kernel.org>,
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	"robh+dt@kernel.org" <robh+dt@kernel.org>,
	"krzysztof.kozlowski+dt@linaro.org" <krzysztof.kozlowski+dt@linaro.org>,
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	"Simek, Michal" <michal.simek@amd.com>,
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	"Levinsky, Ben" <ben.levinsky@amd.com>,
	"Potthuri, Sai Krishna" <sai.krishna.potthuri@amd.com>,
	"Shah, Tanmay" <tanmay.shah@amd.com>,
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Subject: Re: [RFC PATCH 1/3] dt-bindings: fpga: Add support for user-key
 encrypted bitstream loading
Message-ID: <20231222-unisexual-construct-573e79a488c9@spud>
References: <20231122054404.3764288-1-nava.kishore.manne@amd.com>
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On Fri, Nov 24, 2023 at 04:46:06PM +0100, Krzysztof Kozlowski wrote:
> On 24/11/2023 13:48, Conor Dooley wrote:
> > On Fri, Nov 24, 2023 at 06:35:19AM +0000, Manne, Nava kishore wrote:
> >> Hi Conor,
> >>
> >> 	Thanks for providing the review comments.
> >> Please find my response inline.
> >>
> >>> -----Original Message-----
> >>> From: Conor Dooley <conor@kernel.org>
> >>> Sent: Wednesday, November 22, 2023 10:21 PM
> >>> To: Manne, Nava kishore <nava.kishore.manne@amd.com>
> >>> Cc: mdf@kernel.org; hao.wu@intel.com; yilun.xu@intel.com;
> >>> trix@redhat.com; robh+dt@kernel.org; krzysztof.kozlowski+dt@linaro.or=
g;
> >>> conor+dt@kernel.org; Simek, Michal <michal.simek@amd.com>;
> >>> mathieu.poirier@linaro.org; Levinsky, Ben <ben.levinsky@amd.com>;
> >>> Potthuri, Sai Krishna <sai.krishna.potthuri@amd.com>; Shah, Tanmay
> >>> <tanmay.shah@amd.com>; dhaval.r.shah@amd.com; arnd@arndb.de;
> >>> Datta, Shubhrajyoti <shubhrajyoti.datta@amd.com>; linux-
> >>> fpga@vger.kernel.org; devicetree@vger.kernel.org; linux-
> >>> kernel@vger.kernel.org; linux-arm-kernel@lists.infradead.org
> >>> Subject: Re: [RFC PATCH 1/3] dt-bindings: fpga: Add support for user-=
key
> >>> encrypted bitstream loading
> >>>
> >>> On Wed, Nov 22, 2023 at 11:14:02AM +0530, Nava kishore Manne wrote:
> >>>> Adds =E2=80=98encrypted-key-name=E2=80=99 property to support user-k=
ey encrypted
> >>>> bitstream loading use case.
> >>>>
> >>>> Signed-off-by: Nava kishore Manne <nava.kishore.manne@amd.com>
> >>>> ---
> >>>>  .../devicetree/bindings/fpga/fpga-region.txt  | 32
> >>>> +++++++++++++++++++
> >>>
> >>> Is there a reason that this has not yet been converted to yaml?
> >>>
> >> I am not sure about the complication involved here why it's not conver=
ted to yaml format.
> >> Due to time constraints, I couldn=E2=80=99t spend much time so I have =
used this existing legacy format
> >> to add my changes.
> >>
> >>>>  1 file changed, 32 insertions(+)
> >>>>
> >>>> diff --git a/Documentation/devicetree/bindings/fpga/fpga-region.txt
> >>>> b/Documentation/devicetree/bindings/fpga/fpga-region.txt
> >>>> index 528df8a0e6d8..309334558b3f 100644
> >>>> --- a/Documentation/devicetree/bindings/fpga/fpga-region.txt
> >>>> +++ b/Documentation/devicetree/bindings/fpga/fpga-region.txt
> >>>> @@ -177,6 +177,9 @@ Optional properties:
> >>>>  	it indicates that the FPGA has already been programmed with this
> >>> image.
> >>>>  	If this property is in an overlay targeting an FPGA region, it is a
> >>>>  	request to program the FPGA with that image.
> >>>> +- encrypted-key-name : should contain the name of an encrypted key =
file
> >>> located
> >>>> +	on the firmware search path. It will be used to decrypt the FPGA
> >>> image
> >>>> +	file with user-key.
> >>>
> >>> I might be misreading things, but your driver code seems to assume th=
at this
> >>> is an aes key. Nothing here seems to document that this is supposed t=
o be a
> >>> key of a particular type.
> >>>
> >>
> >> Yes, these changes are intended to add the support for Aes user-key en=
crypted bitstream loading use case.
> >> Will fix it in v2, something like below.
> >> aes-key-file-name : Should contain the AES key file name on the firmwa=
re search path.
> >> 		      The key file contains the AES key and it will be used to decry=
pt the FPGA image.
> >=20
> > Then when someone comes along looking for a different type of encryption
> > we will end up with national-pride-foo-file-name etc. I think I'd rather
> > have a second property that notes what type of cipher is being used and
> > if that property is not present default to AES.
>=20
> I wonder why does it need to be in DT in the first place? Why it cannot
> be appended to the FPGA binary image itself? Which also points to
> dubious security aspect of this approach... Shipping FPGA encrypted
> image with its decryption key sounds like marvelous idea.
>=20
> Even if this is suitable, why not using more arguments of firmware-name?
> This would scale even for multiple FPGA firmwares with different keys
> (although such need seems unlikely).

In case it is not clear (given the month's delay here), this question is
for the submitter of the series to answer, not me.

Cheers,
Conor.

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