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Wed, 27 Dec 2023 20:30:50 GMT Received: from hu-bjorande-lv.qualcomm.com (10.49.16.6) by nalasex01c.na.qualcomm.com (10.47.97.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.40; Wed, 27 Dec 2023 12:30:49 -0800 Date: Wed, 27 Dec 2023 12:30:48 -0800 From: Bjorn Andersson To: Krzysztof Kozlowski CC: Bjorn Andersson , Konrad Dybcio , Michael Turquette , Stephen Boyd , Rob Herring , "Krzysztof Kozlowski" , Conor Dooley , Taniya Das , Ulf Hansson , Johan Hovold , "Catalin Marinas" , Will Deacon , , , , , , Subject: Re: [PATCH v2 1/8] dt-bindings: clock: qcom: Allow VDD_GFX supply to GX Message-ID: <20231227203048.GB1315173@hu-bjorande-lv.qualcomm.com> References: <20231220-sa8295p-gpu-v2-0-4763246b72c0@quicinc.com> <20231220-sa8295p-gpu-v2-1-4763246b72c0@quicinc.com> <26617c83-31b3-4ad9-8a61-0b8271fad41f@linaro.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Disposition: inline In-Reply-To: <26617c83-31b3-4ad9-8a61-0b8271fad41f@linaro.org> X-ClientProxiedBy: nalasex01b.na.qualcomm.com (10.47.209.197) To nalasex01c.na.qualcomm.com (10.47.97.35) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: 98FPQG18Sqptx1Veng75-suqw_ecH733 X-Proofpoint-GUID: 98FPQG18Sqptx1Veng75-suqw_ecH733 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.997,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-12-09_01,2023-12-07_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 mlxlogscore=999 mlxscore=0 suspectscore=0 spamscore=0 phishscore=0 adultscore=0 impostorscore=0 priorityscore=1501 malwarescore=0 bulkscore=0 lowpriorityscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2311290000 definitions=main-2312270151 On Fri, Dec 22, 2023 at 09:12:04AM +0100, Krzysztof Kozlowski wrote: > On 22/12/2023 05:39, Bjorn Andersson wrote: > > In some designs the SoC's VDD_GFX pads are supplied by an external > > regulator, rather than a power-domain. Allow this to be described in the > > GPU clock controller binding. > > > > Signed-off-by: Bjorn Andersson > > --- > > Documentation/devicetree/bindings/clock/qcom,gpucc.yaml | 16 ++++++++++++++++ > > 1 file changed, 16 insertions(+) > > > > diff --git a/Documentation/devicetree/bindings/clock/qcom,gpucc.yaml b/Documentation/devicetree/bindings/clock/qcom,gpucc.yaml > > index f369fa34e00c..c0dd24c9dcb3 100644 > > --- a/Documentation/devicetree/bindings/clock/qcom,gpucc.yaml > > +++ b/Documentation/devicetree/bindings/clock/qcom,gpucc.yaml > > @@ -53,6 +53,9 @@ properties: > > power-domains: > > maxItems: 1 > > > > + vdd-gfx-supply: > > + description: Regulator supply for the VDD_GFX pads > > + > > '#clock-cells': > > const: 1 > > > > @@ -74,6 +77,19 @@ required: > > - '#reset-cells' > > - '#power-domain-cells' > > > > +# Allow either power-domains or vdd-gfx-supply, not both > > +oneOf: > > + - required: > > + - power-domains > > + - required: > > + - vdd-gfx-supply > > This should be enough, assuming one of them is actually required. The > code. See also: > https://elixir.bootlin.com/linux/v5.17-rc2/source/Documentation/devicetree/bindings/reserved-memory/reserved-memory.yaml#L91 > Yes, that would be the correct binding. But the majority of our DeviceTree source does not specify a power-domain for their gpucc. While this should be corrected, it seem reasonable to leave this optional for now. Regards, Bjorn